mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 18:28:55 +00:00
271e9ecd72
Adding new node drvsel and smplsel for SDMMC Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jaehoon Chung <jh80.chung@samsung.com>
36 lines
573 B
Text
36 lines
573 B
Text
/*
|
|
* Copyright (C) 2013 Altera Corporation <www.altera.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
/dts-v1/;
|
|
/* First 4KB has trampoline code for secondary cores. */
|
|
/memreserve/ 0x00000000 0x0001000;
|
|
#include "socfpga.dtsi"
|
|
|
|
/ {
|
|
soc {
|
|
clkmgr@ffd04000 {
|
|
clocks {
|
|
osc1 {
|
|
clock-frequency = <25000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
mmc0: dwmmc0@ff704000 {
|
|
num-slots = <1>;
|
|
broken-cd;
|
|
bus-width = <4>;
|
|
cap-mmc-highspeed;
|
|
cap-sd-highspeed;
|
|
drvsel = <3>;
|
|
smplsel = <0>;
|
|
};
|
|
|
|
sysmgr@ffd08000 {
|
|
cpu1-start-addr = <0xffd080c4>;
|
|
};
|
|
};
|
|
};
|