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u-boot/arch/x86/cpu
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Simon Glass 9818a00eea x86: ivybridge: Set up an MTRR for the video frame buffer 
Set the frame buffer to write-combining. This makes it faster, although for
scrolling write-through is even faster for U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-13 07:25:00 -08:00
..
coreboot x86: Add support for MTRRs 2015-01-13 07:25:00 -08:00
ivybridge x86: ivybridge: Set up an MTRR for the video frame buffer 2015-01-13 07:25:00 -08:00
queensbay x86: Simplify the fsp hob access functions 2015-01-12 17:03:41 -08:00
call64.S x86: Add support for starting 64-bit kernel 2014-10-28 20:43:47 -06:00
config.mk x86: Factor out common values in the link script 2014-11-25 06:33:59 -07:00
cpu.c x86: Add GDT descriptors for option ROMs 2014-11-25 06:34:14 -07:00
interrupts.c x86: Drop old CONFIG_INTEL_CORE_ARCH code 2014-11-25 06:34:03 -07:00
lapic.c x86: Add LAPIC setup code 2014-11-25 06:34:11 -07:00
Makefile x86: Add support for MTRRs 2015-01-13 07:25:00 -08:00
mtrr.c x86: Add support for MTRRs 2015-01-13 07:25:00 -08:00
pci.c pci: Make pci apis usable before relocation 2015-01-12 17:03:41 -08:00
resetvec.S Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
start.S x86: Support Intel FSP initialization path in start.S 2014-12-13 22:32:05 -07:00
start16.S x86: Save the BIST value on reset 2014-11-21 07:24:10 +01:00
turbo.c x86: Add Intel speedstep and turbo mode code 2014-11-25 06:34:02 -07:00
u-boot.lds x86: Factor out common values in the link script 2014-11-25 06:33:59 -07:00