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053fce84c1
This patch adds watchdog support for the Mediatek MT7621 SoC. The driver is loosly based on the Linux kernel version. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> [fixed merge conflict in drivers/watchdog/Kconfig] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
102 lines
2.1 KiB
C
102 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Ralink / Mediatek RT288x/RT3xxx/MT76xx built-in hardware watchdog timer
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*
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* Copyright (C) 2018 Stefan Roese <sr@denx.de>
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*
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* Based on the Linux driver version which is:
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* Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2013 John Crispin <blogic@openwrt.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include <wdt.h>
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#include <linux/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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struct mt762x_wdt {
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void __iomem *regs;
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};
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#define TIMER_REG_TMRSTAT 0x00
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#define TIMER_REG_TMR1CTL 0x20
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#define TIMER_REG_TMR1LOAD 0x24
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#define TMR1CTL_ENABLE BIT(7)
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#define TMR1CTL_RESTART BIT(9)
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#define TMR1CTL_PRESCALE_SHIFT 16
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static int mt762x_wdt_ping(struct mt762x_wdt *priv)
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{
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writel(TMR1CTL_RESTART, priv->regs + TIMER_REG_TMRSTAT);
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return 0;
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}
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static int mt762x_wdt_start(struct udevice *dev, u64 ms, ulong flags)
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{
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struct mt762x_wdt *priv = dev_get_priv(dev);
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/* set the prescaler to 1ms == 1000us */
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writel(1000 << TMR1CTL_PRESCALE_SHIFT, priv->regs + TIMER_REG_TMR1CTL);
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writel(ms, priv->regs + TIMER_REG_TMR1LOAD);
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setbits_le32(priv->regs + TIMER_REG_TMR1CTL, TMR1CTL_ENABLE);
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return 0;
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}
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static int mt762x_wdt_stop(struct udevice *dev)
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{
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struct mt762x_wdt *priv = dev_get_priv(dev);
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mt762x_wdt_ping(priv);
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clrbits_le32(priv->regs + TIMER_REG_TMR1CTL, TMR1CTL_ENABLE);
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return 0;
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}
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static int mt762x_wdt_reset(struct udevice *dev)
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{
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struct mt762x_wdt *priv = dev_get_priv(dev);
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mt762x_wdt_ping(priv);
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return 0;
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}
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static int mt762x_wdt_probe(struct udevice *dev)
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{
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struct mt762x_wdt *priv = dev_get_priv(dev);
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priv->regs = dev_remap_addr(dev);
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if (!priv->regs)
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return -EINVAL;
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mt762x_wdt_stop(dev);
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return 0;
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}
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static const struct wdt_ops mt762x_wdt_ops = {
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.start = mt762x_wdt_start,
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.reset = mt762x_wdt_reset,
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.stop = mt762x_wdt_stop,
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};
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static const struct udevice_id mt762x_wdt_ids[] = {
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{ .compatible = "mediatek,mt7621-wdt" },
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{}
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};
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U_BOOT_DRIVER(mt762x_wdt) = {
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.name = "mt762x_wdt",
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.id = UCLASS_WDT,
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.of_match = mt762x_wdt_ids,
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.probe = mt762x_wdt_probe,
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.priv_auto_alloc_size = sizeof(struct mt762x_wdt),
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.ops = &mt762x_wdt_ops,
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};
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