mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-02 01:19:49 +00:00
c05ed00afb
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
242 lines
6.4 KiB
C
242 lines
6.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018-2019 Toradex AG
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*/
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#include <common.h>
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#include <init.h>
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#include <linux/delay.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch-mx6/clock.h>
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#include <asm/arch-mx6/imx-regs.h>
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#include <asm/arch-mx6/mx6ull_pins.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/iomux-v3.h>
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#include <asm/io.h>
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#include <dm.h>
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#include <dm/platform_data/serial_mxc.h>
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#include <env.h>
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#include <fdt_support.h>
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#include <imx_thermal.h>
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#include <jffs2/load_kernel.h>
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#include <linux/sizes.h>
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#include <miiphy.h>
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#include <mtd_node.h>
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#include <netdev.h>
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#include "../common/tdx-common.h"
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#include "../common/tdx-cfg-block.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
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PAD_CTL_DSE_48ohm)
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#define MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR 0x2290040
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#define NAND_PAD_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_SRE_SLOW | PAD_CTL_HYS)
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#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_PUS_22K_UP)
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
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return 0;
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}
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#ifdef CONFIG_NAND_MXS
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static void setup_gpmi_nand(void)
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{
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setup_gpmi_io_clk((3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) |
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(3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET));
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}
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#endif /* CONFIG_NAND_MXS */
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#ifdef CONFIG_VIDEO_MXS
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static iomux_v3_cfg_t const lcd_pads[] = {
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MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_ENABLE__LCDIF_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_HSYNC__LCDIF_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA00__LCDIF_DATA00 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA01__LCDIF_DATA01 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA02__LCDIF_DATA02 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA03__LCDIF_DATA03 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA04__LCDIF_DATA04 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA05__LCDIF_DATA05 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA06__LCDIF_DATA06 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA07__LCDIF_DATA07 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA08__LCDIF_DATA08 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA09__LCDIF_DATA09 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA10__LCDIF_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA11__LCDIF_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA12__LCDIF_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA13__LCDIF_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA14__LCDIF_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA15__LCDIF_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA16__LCDIF_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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MX6_PAD_LCD_DATA17__LCDIF_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL),
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};
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static iomux_v3_cfg_t const backlight_pads[] = {
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/* Backlight On */
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MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
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/* Backlight PWM<A> (multiplexed pin) */
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MX6_PAD_NAND_WP_B__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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#define GPIO_BL_ON IMX_GPIO_NR(1, 11)
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#define GPIO_PWM_A IMX_GPIO_NR(4, 11)
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static int setup_lcd(void)
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{
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imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
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imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads));
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/* Set BL_ON */
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gpio_request(GPIO_BL_ON, "BL_ON");
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gpio_direction_output(GPIO_BL_ON, 1);
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/* Set PWM<A> to full brightness (assuming inversed polarity) */
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gpio_request(GPIO_PWM_A, "PWM<A>");
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gpio_direction_output(GPIO_PWM_A, 0);
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return 0;
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}
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#endif
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#ifdef CONFIG_FEC_MXC
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static int setup_fec(void)
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{
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struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
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int ret;
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/* provide the PHY clock from the i.MX 6 */
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ret = enable_fec_anatop_clock(1, ENET_50MHZ);
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if (ret)
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return ret;
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/* Use 50M anatop REF_CLK and output it on ENET2_TX_CLK */
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clrsetbits_le32(&iomuxc_regs->gpr[1],
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IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK,
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IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
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/* give new Ethernet PHY power save mode circuitry time to settle */
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mdelay(300);
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return 0;
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}
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int board_phy_config(struct phy_device *phydev)
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{
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if (phydev->drv->config)
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phydev->drv->config(phydev);
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return 0;
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}
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#endif /* CONFIG_FEC_MXC */
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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#ifdef CONFIG_FEC_MXC
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setup_fec();
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#endif
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#ifdef CONFIG_NAND_MXS
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setup_gpmi_nand();
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#endif
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#ifdef CONFIG_VIDEO_MXS
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setup_lcd();
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#endif
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return 0;
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}
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#ifdef CONFIG_CMD_BMODE
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/* TODO */
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static const struct boot_mode board_boot_modes[] = {
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/* 4 bit bus width */
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{"nand", MAKE_CFGVAL(0x40, 0x34, 0x00, 0x00)},
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{"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)},
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{NULL, 0},
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};
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#endif
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int board_late_init(void)
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{
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#ifdef CONFIG_TDX_CFG_BLOCK
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/*
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* If we have a valid config block and it says we are a module with
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* Wi-Fi/Bluetooth make sure we use the -wifi device tree.
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*/
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if (tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT_IT ||
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tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT)
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env_set("variant", "-wifi");
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#endif
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/*
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* Disable output driver of PAD CCM_PMIC_STBY_REQ. This prevents the
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* SOC to request for a lower voltage during sleep. This is necessary
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* because the voltage is changing too slow for the SOC to wake up
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* properly.
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*/
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__raw_writel(0x8080, MX6_PAD_SNVS_PMIC_STBY_REQ_ADDR);
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#ifdef CONFIG_CMD_BMODE
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add_board_boot_modes(board_boot_modes);
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#endif
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#ifdef CONFIG_CMD_USB_SDP
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if (is_boot_from_usb()) {
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printf("Serial Downloader recovery mode, using sdp command\n");
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env_set("bootdelay", "0");
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env_set("bootcmd", "sdp 0");
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}
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#endif /* CONFIG_CMD_USB_SDP */
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return 0;
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}
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int checkboard(void)
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{
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printf("Model: Toradex Colibri iMX6ULL\n");
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return 0;
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}
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, bd_t *bd)
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{
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#if defined(CONFIG_FDT_FIXUP_PARTITIONS)
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static struct node_info nodes[] = {
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{ "fsl,imx6ull-gpmi-nand", MTD_DEV_TYPE_NAND, },
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{ "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, },
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};
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/* Update partition nodes using info from mtdparts env var */
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puts(" Updating MTD partitions...\n");
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fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
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#endif
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return ft_common_board_setup(blob, bd);
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}
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#endif
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static struct mxc_serial_platdata mxc_serial_plat = {
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.reg = (struct mxc_uart *)UART1_BASE,
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.use_dte = 1,
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};
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U_BOOT_DEVICE(mxc_serial) = {
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.name = "serial_mxc",
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.platdata = &mxc_serial_plat,
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};
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