Michal Simek 96a5d4dc1e zynq: Update CLK in bdinfo ... ARM has specific clk entries which should be also setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com>		2014-02-19 09:41:22 +01:00
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clk.c	zynq: Update CLK in bdinfo	2014-02-19 09:41:22 +01:00
cpu.c	zynq: Provide a framework to read clock frequencies	2014-02-19 09:41:21 +01:00
ddrc.c	zynq: Add new ddrc driver for ECC support	2013-08-12 08:59:55 +02:00
Makefile	zynq: Provide a framework to read clock frequencies	2014-02-19 09:41:21 +01:00
slcr.c	net: zynq_gem: Calculate clock dividers dynamically	2014-02-19 09:41:21 +01:00
timer.c	zynq: timer: Fix hangs if network activity attempted after about one hour	2014-02-19 09:41:21 +01:00
u-boot.lds	zynq: Fix elf header generation	2014-02-13 15:33:00 +01:00