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78118211fb
This driver can control up to 32 clocks. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
24 lines
625 B
C
24 lines
625 B
C
/*
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
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*
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* Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __DT_BINDINGS_RESET_BCM6328_H
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#define __DT_BINDINGS_RESET_BCM6328_H
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#define BCM6328_RST_SPI 0
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#define BCM6328_RST_EPHY 1
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#define BCM6328_RST_SAR 2
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#define BCM6328_RST_ENETSW 3
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#define BCM6328_RST_USBS 4
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#define BCM6328_RST_USBH 5
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#define BCM6328_RST_PCM 6
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#define BCM6328_RST_PCIE_CORE 7
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#define BCM6328_RST_PCIE 8
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#define BCM6328_RST_PCIE_EXT 9
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#define BCM6328_RST_PCIE_HARD 10
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#endif /* __DT_BINDINGS_RESET_BCM6328_H */
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