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u-boot/drivers/phy/cadence
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Swapnil Jakhade 960efc5edc phy: cadence: Sierra: Update single link PCIe register configuration 
Add single link PCIe register configurations for no SSC and internal
SSC. Also, add missing PMA lane registers for external SSC.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 11:00:03 -05:00
..
Kconfig phy: cadence: Add driver for Torrent SERDES 2021-07-27 10:57:12 +05:30
Makefile phy: cadence: Add driver for Torrent SERDES 2021-07-27 10:57:12 +05:30
phy-cadence-sierra.c phy: cadence: Sierra: Update single link PCIe register configuration 2022-02-08 11:00:03 -05:00
phy-cadence-torrent.c phy: cadence: phy-cadence-torrent: Change the name of subnode searched 2021-11-17 17:09:47 -05:00