u-boot/board/xilinx
Algapally Santosh Sagar f0f86d39fe fru: ops: Display FRU fields properly for 0xc1 fields
FRU data is not displayed properly in case of 0xc1 fields.
The 0xC1 can be used in two cases.
1. Char record type 8-bit ASCII + Latin 1 with length of 1.
(For example board revision 'A')

2. C1h (type/length byte encoded to indicate no more info fields).
which can follow by 00h to fill all remaining unused space

Hence removed the check end-of-the field c1 to allow c1 fields.

"ASCII+LATIN1" is defined as the printable characters from the
first set of 256 characters of Unicode 6.2 (U+0000h through U+00FFh,
inclusive) expressed as an eight-bit value. (Unicode follows ISO/IEC
8859-1 in the layout of printable characters up to U+00FFh).

So, print only printable chars and limit range from 0x20 ' ' to 0x7e '-'
which will be also indication if 0xc1 behaves as record with one char or
end of record.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4198d73de600627872c80a5b07e5068502c589d7.1674648379.git.michal.simek@amd.com
2023-01-27 08:49:24 +01:00
..
bootscripts xilinx: Add sd boot command script for reference 2019-10-08 09:11:13 +02:00
common fru: ops: Display FRU fields properly for 0xc1 fields 2023-01-27 08:49:24 +01:00
microblaze-generic arm64: xilinx: Move board_get_usable_ram_top() to common location 2022-09-13 11:32:48 +02:00
versal xilinx: versal: Add missing header 2023-01-27 08:42:47 +01:00
versal-net xilinx: versal-net: Add support for timer and start it 2023-01-16 15:34:37 +01:00
zynq global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_* 2022-12-05 16:06:07 -05:00
zynqmp arm64: zynqmp: Add support for Kria K24 SOM 2023-01-24 13:59:33 +01:00
zynqmp_r5 .mailmap: Start to use new amd.com email address 2022-04-19 14:51:11 -04:00
Kconfig xilinx: Remove unused ZYNQ_MAC_IN_EEPROM/ZYNQ_GEM_I2C_MAC_OFFSET entries 2022-12-05 08:55:55 +01:00