u-boot/arch/arm/dts/sun50i-h6-cpu-opp.dtsi
Jernej Skrabec 750cabc87b ARM: dts: sunxi: h6: Update DT files
Updated H6 DT files are based on Linux 5.11-rc1 release.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2020 Ondrej Jirman <megous@megous.com>
// Copyright (C) 2020 Clément Péron <peron.clem@gmail.com>
/ {
cpu_opp_table: cpu-opp-table {
compatible = "allwinner,sun50i-h6-operating-points";
nvmem-cells = <&cpu_speed_grade>;
opp-shared;
opp@480000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <480000000>;
opp-microvolt-speed0 = <880000 880000 1200000>;
opp-microvolt-speed1 = <820000 820000 1200000>;
opp-microvolt-speed2 = <820000 820000 1200000>;
};
opp@720000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <720000000>;
opp-microvolt-speed0 = <880000 880000 1200000>;
opp-microvolt-speed1 = <820000 820000 1200000>;
opp-microvolt-speed2 = <820000 820000 1200000>;
};
opp@816000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <816000000>;
opp-microvolt-speed0 = <880000 880000 1200000>;
opp-microvolt-speed1 = <820000 820000 1200000>;
opp-microvolt-speed2 = <820000 820000 1200000>;
};
opp@888000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <888000000>;
opp-microvolt-speed0 = <880000 880000 1200000>;
opp-microvolt-speed1 = <820000 820000 1200000>;
opp-microvolt-speed2 = <820000 820000 1200000>;
};
opp@1080000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1080000000>;
opp-microvolt-speed0 = <940000 940000 1200000>;
opp-microvolt-speed1 = <880000 880000 1200000>;
opp-microvolt-speed2 = <880000 880000 1200000>;
};
opp@1320000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1320000000>;
opp-microvolt-speed0 = <1000000 1000000 1200000>;
opp-microvolt-speed1 = <940000 940000 1200000>;
opp-microvolt-speed2 = <940000 940000 1200000>;
};
opp@1488000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1488000000>;
opp-microvolt-speed0 = <1060000 1060000 1200000>;
opp-microvolt-speed1 = <1000000 1000000 1200000>;
opp-microvolt-speed2 = <1000000 1000000 1200000>;
};
opp@1608000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt-speed0 = <1090000 1090000 1200000>;
opp-microvolt-speed1 = <1030000 1030000 1200000>;
opp-microvolt-speed2 = <1030000 1030000 1200000>;
};
opp@1704000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1704000000>;
opp-microvolt-speed0 = <1120000 1120000 1200000>;
opp-microvolt-speed1 = <1060000 1060000 1200000>;
opp-microvolt-speed2 = <1060000 1060000 1200000>;
};
opp@1800000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt-speed0 = <1160000 1160000 1200000>;
opp-microvolt-speed1 = <1100000 1100000 1200000>;
opp-microvolt-speed2 = <1100000 1100000 1200000>;
};
};
};
&cpu0 {
operating-points-v2 = <&cpu_opp_table>;
};
&cpu1 {
operating-points-v2 = <&cpu_opp_table>;
};
&cpu2 {
operating-points-v2 = <&cpu_opp_table>;
};
&cpu3 {
operating-points-v2 = <&cpu_opp_table>;
};