mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-26 22:52:18 +00:00
c978b52410
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Tensilica, inc. This is the second part of the basic architecture port, adding the 'arch/xtensa' directory and a readme file. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
8 lines
130 B
Makefile
8 lines
130 B
Makefile
#
|
|
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
|
|
head-y := arch/xtensa/cpu/start.o
|
|
|
|
libs-y += arch/xtensa/cpu/
|
|
libs-y += arch/xtensa/lib/
|