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If the core runs at higher than x3 speed of the platform, there is possiblity about sev instruction to getting missed by other cores. This is because of SoC Run Control block may not able to sample the EVENTI(Sev) signals. Configure Run Control and EPU to periodically send out EVENTI signals to wake up A57 cores. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
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| .. | ||
| fsl-layerscape | ||
| hisilicon | ||
| zynqmp | ||
| cache.S | ||
| cache_v8.c | ||
| config.mk | ||
| cpu.c | ||
| exceptions.S | ||
| generic_timer.c | ||
| Kconfig | ||
| Makefile | ||
| start.S | ||
| tlb.S | ||
| transition.S | ||
| u-boot-spl.lds | ||
| u-boot.lds | ||