mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-13 23:02:59 +00:00
fd6e425be2
Add sfc and flash node to device tree and config options to enable support for booting from SPI NOR flash on Radxa ROCK 5 Model B. Similar to RK3568 the BootRom in RK3588 can read all data and look for idbloader at 0x8000, same as on SD and eMMC. Use the rksd format and modify the mkimage offset to generate a bootable u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash. The FIT image is loaded from 0x60000. => sf probe SF: Detected mx25u12835f with page size 256 Bytes, erase size 4 KiB, total 16 MiB => load mmc 1:1 10000000 u-boot-rockchip-spi.bin 1492992 bytes read in 129 ms (11 MiB/s) => sf update $fileaddr 0 $filesize device 0 offset 0x0, size 0x16c800 1300480 bytes written, 192512 bytes skipped in 11.103s, speed 137694 B/s The BROM_BOOTSOURCE_ID value read back when booting from SPI flash does not match the expected value of 3 (SPINOR) used by other SoCs. Instead a value of 6 is read back, add a new enum value to handle this new bootsource id. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
63 lines
1.6 KiB
C
63 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* (C) Copyright 2017 Heiko Stuebner <heiko@sntech.de>
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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*/
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#ifndef _ASM_ARCH_BOOTROM_H
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#define _ASM_ARCH_BOOTROM_H
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/*
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* Saved Stack pointer address.
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* Access might be needed in some special cases.
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*/
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extern u32 SAVE_SP_ADDR;
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/**
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* back_to_bootrom() - return to bootrom (for TPL/SPL), passing a
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* result code
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*
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* Transfer control back to the Rockchip BROM, restoring necessary
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* register context and passing a command/result code to the BROM
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* to instruct its next actions (e.g. continue boot sequence, enter
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* download mode, ...).
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*
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* This function does not return.
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*
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* @brom_cmd: indicates how the bootrom should continue the boot
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* sequence (e.g. load the next stage)
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*/
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enum rockchip_bootrom_cmd {
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/*
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* These can not start at 0, as 0 has a special meaning
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* for setjmp().
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*/
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BROM_BOOT_NEXTSTAGE = 1, /* continue boot-sequence */
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BROM_BOOT_ENTER_DNL, /* have BROM enter download-mode */
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};
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void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd);
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/**
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* Boot-device identifiers as used by the BROM
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*/
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enum {
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BROM_BOOTSOURCE_NAND = 1,
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BROM_BOOTSOURCE_EMMC = 2,
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BROM_BOOTSOURCE_SPINOR = 3,
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BROM_BOOTSOURCE_SPINAND = 4,
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BROM_BOOTSOURCE_SD = 5,
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BROM_BOOTSOURCE_SPINOR_RK3588 = 6,
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BROM_BOOTSOURCE_USB = 10,
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BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB
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};
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extern const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1];
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/**
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* Locations of the boot-device identifier in SRAM
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*/
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#define BROM_BOOTSOURCE_ID_ADDR (CFG_IRAM_BASE + 0x10)
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#endif
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