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507bbe3e80
- add support for microblaze processors - add support for AtmarkTechno "suzaku" board
53 lines
1.5 KiB
C
53 lines
1.5 KiB
C
/*
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* include/asm-microblaze/byteorder.h -- Endian id and conversion ops
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*
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* Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au>
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* Copyright (C) 2001 NEC Corporation
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* Copyright (C) 2001 Miles Bader <miles@gnu.org>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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* Written by Miles Bader <miles@gnu.org>
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* Microblaze port by John Williams
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*/
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#ifndef __MICROBLAZE_BYTEORDER_H__
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#define __MICROBLAZE_BYTEORDER_H__
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#include <asm/types.h>
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#ifdef __GNUC__
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/* This is effectively a dupe of the arch-independent byteswap
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code in include/linux/byteorder/swab.h, however we force a cast
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of the result up to 32 bits. This in turn forces the compiler
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to explicitly clear the high 16 bits, which it wasn't doing otherwise.
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I think this is a symptom of a bug in mb-gcc. JW 20040303
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*/
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static __inline__ __const__ __u16 ___arch__swab16 (__u16 half_word)
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{
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/* 32 bit temp to cast result, forcing clearing of high word */
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__u32 temp;
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temp = ((half_word & 0x00FFU) << 8) | ((half_word & 0xFF00U) >> 8);
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return (__u16) temp;
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}
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#define __arch__swab16(x) ___arch__swab16(x)
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/* Microblaze has no arch-specific endian conversion insns */
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#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
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# define __BYTEORDER_HAS_U64__
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# define __SWAB_64_THRU_32__
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#endif
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#endif /* __GNUC__ */
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#include <linux/byteorder/big_endian.h>
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#endif /* __MICROBLAZE_BYTEORDER_H__ */
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