mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-21 10:43:06 +00:00
20e442ab2d
The current macro is a misnomer since it does not declare a device directly. Instead, it declares driver_info record which U-Boot uses at runtime to create a device. The distinction seems somewhat minor most of the time, but is becomes quite confusing when we actually want to declare a device, with of-platdata. We are left trying to distinguish between a device which isn't actually device, and a device that is (perhaps an 'instance'?) It seems better to rename this macro to describe what it actually is. The macros is not widely used, since boards should use devicetree to declare devices. Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is declaring a new driver_info record, not a device. Signed-off-by: Simon Glass <sjg@chromium.org>
152 lines
3.1 KiB
C
152 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Toradex Colibri PXA270 Support
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*
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* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
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* Copyright (C) 2016-2019 Marcel Ziswiler <marcel.ziswiler@toradex.com>
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*/
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#include <common.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <init.h>
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#include <net.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/pxa.h>
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#include <asm/arch/regs-mmc.h>
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#include <asm/arch/regs-uart.h>
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#include <asm/io.h>
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#include <dm/platdata.h>
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#include <dm/platform_data/pxa_mmc_gen.h>
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#include <dm/platform_data/serial_pxa.h>
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#include <netdev.h>
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#include <serial.h>
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#include <usb.h>
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#include <asm/mach-types.h>
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#include <linux/delay.h>
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#include "../common/tdx-common.h"
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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/* We have RAM, disable cache */
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dcache_disable();
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icache_disable();
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/* arch number of Toradex Colibri PXA270 */
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gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
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/* address of boot parameters */
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gd->bd->bi_boot_params = 0xa0000100;
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return 0;
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}
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int checkboard(void)
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{
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puts("Model: Toradex Colibri PXA270\n");
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return 0;
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}
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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return ft_common_board_setup(blob, bd);
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}
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#endif
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int dram_init(void)
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{
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pxa2xx_dram_init();
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gd->ram_size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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#ifdef CONFIG_CMD_USB
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int board_usb_init(int index, enum usb_init_type init)
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{
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writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
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~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
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UHCHR);
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writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
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while (UHCHR & UHCHR_FSBIR)
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;
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writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
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writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
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/* Clear any OTG Pin Hold */
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if (readl(PSSR) & PSSR_OTGPH)
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writel(readl(PSSR) | PSSR_OTGPH, PSSR);
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writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
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writel(readl(UHCRHDA) | 0x100, UHCRHDA);
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/* Set port power control mask bits, only 3 ports. */
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writel(readl(UHCRHDB) | (0x7 << 17), UHCRHDB);
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/* enable port 2 */
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writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
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UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
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return 0;
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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return 0;
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}
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void usb_board_stop(void)
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{
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writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
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udelay(11);
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writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
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writel(readl(UHCCOMS) | 1, UHCCOMS);
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udelay(10);
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writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
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}
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#endif
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#ifdef CONFIG_DRIVER_DM9000
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int board_eth_init(struct bd_info *bis)
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{
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return dm9000_initialize(bis);
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}
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#endif
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#ifdef CONFIG_CMD_MMC
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#if !CONFIG_IS_ENABLED(DM_MMC)
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int board_mmc_init(struct bd_info *bis)
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{
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pxa_mmc_register(0);
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return 0;
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}
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#else /* !CONFIG_IS_ENABLED(DM_MMC) */
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static const struct pxa_mmc_plat mmc_plat = {
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.base = (struct pxa_mmc_regs *)MMC0_BASE,
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};
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U_BOOT_DRVINFO(pxa_mmcs) = {
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.name = "pxa_mmc",
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.plat = &mmc_plat,
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};
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#endif /* !CONFIG_IS_ENABLED(DM_MMC) */
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#endif
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static const struct pxa_serial_plat serial_plat = {
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.base = (struct pxa_uart_regs *)FFUART_BASE,
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.port = FFUART_INDEX,
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.baudrate = CONFIG_BAUDRATE,
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};
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U_BOOT_DRVINFO(pxa_serials) = {
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.name = "serial_pxa",
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.plat = &serial_plat,
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};
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