mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-21 18:53:06 +00:00
6b9a829d27
This has not been migrated to DM_VIDEO since 2019. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
110 lines
2.6 KiB
C
110 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* (C) Copyright 2007-2008
|
|
* Stelian Pop <stelian@popies.net>
|
|
* Lead Tech Design <www.leadtechdesign.com>
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <debug_uart.h>
|
|
#include <init.h>
|
|
#include <vsprintf.h>
|
|
#include <asm/global_data.h>
|
|
#include <asm/io.h>
|
|
#include <asm/mach-types.h>
|
|
#include <asm/arch/at91sam9rl.h>
|
|
#include <asm/arch/at91sam9rl_matrix.h>
|
|
#include <asm/arch/at91sam9_smc.h>
|
|
#include <asm/arch/at91_common.h>
|
|
#include <asm/arch/at91_rstc.h>
|
|
#include <asm/arch/clk.h>
|
|
#include <asm/arch/gpio.h>
|
|
|
|
#include <atmel_lcdc.h>
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
/* ------------------------------------------------------------------------- */
|
|
/*
|
|
* Miscelaneous platform dependent initialisations
|
|
*/
|
|
|
|
#ifdef CONFIG_CMD_NAND
|
|
static void at91sam9rlek_nand_hw_init(void)
|
|
{
|
|
struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
|
|
struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
|
|
unsigned long csa;
|
|
|
|
/* Enable CS3 */
|
|
csa = readl(&matrix->ebicsa);
|
|
csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
|
|
|
|
writel(csa, &matrix->ebicsa);
|
|
|
|
/* Configure SMC CS3 for NAND/SmartMedia */
|
|
writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
|
|
AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
|
|
&smc->cs[3].setup);
|
|
writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
|
|
AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
|
|
&smc->cs[3].pulse);
|
|
writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
|
|
&smc->cs[3].cycle);
|
|
writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
|
|
AT91_SMC_MODE_EXNW_DISABLE |
|
|
#ifdef CONFIG_SYS_NAND_DBW_16
|
|
AT91_SMC_MODE_DBW_16 |
|
|
#else /* CONFIG_SYS_NAND_DBW_8 */
|
|
AT91_SMC_MODE_DBW_8 |
|
|
#endif
|
|
AT91_SMC_MODE_TDF_CYCLE(2),
|
|
&smc->cs[3].mode);
|
|
|
|
at91_periph_clk_enable(ATMEL_ID_PIOD);
|
|
|
|
/* Configure RDY/BSY */
|
|
at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
|
|
|
|
/* Enable NandFlash */
|
|
at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
|
|
|
|
at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */
|
|
at91_set_A_periph(AT91_PIN_PB5, 0); /* NANDWE */
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
|
|
void board_debug_uart_init(void)
|
|
{
|
|
at91_seriald_hw_init();
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_BOARD_EARLY_INIT_F
|
|
int board_early_init_f(void)
|
|
{
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
int board_init(void)
|
|
{
|
|
/* arch number of AT91SAM9RLEK-Board */
|
|
gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9RLEK;
|
|
/* adress of boot parameters */
|
|
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
|
|
|
|
#ifdef CONFIG_CMD_NAND
|
|
at91sam9rlek_nand_hw_init();
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
int dram_init(void)
|
|
{
|
|
gd->ram_size = get_ram_size(
|
|
(void *)CONFIG_SYS_SDRAM_BASE,
|
|
CONFIG_SYS_SDRAM_SIZE);
|
|
return 0;
|
|
}
|