u-boot/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
Lokesh Vutla 853f7f5018 arm64: dts: k3: Add u-boot specific nodes
Add the minimum dt nodes required to boot. These nodes
will get deleted as kernel gets these nodes added in the
main dts files.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00

203 lines
4.9 KiB
Text

// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/pinctrl/k3-am65.h>
/ {
chosen {
stdout-path = "serial2:115200n8";
};
aliases {
serial2 = &main_uart0;
};
};
&cbass_main{
u-boot,dm-spl;
secure_proxy: secure_proxy@32c00000 {
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg-names = "target_data", "rt", "scfg";
reg = <0x32c00000 0x100000>,
<0x32400000 0x100000>,
<0x32800000 0x100000>;
interrupt-names = "rx_011";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
};
dmsc: dmsc {
compatible = "ti,k2g-sci";
ti,host-id = <12>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
/*
* In case of rare platforms that does not use am6 as
* system master, use /delete-property/
*/
ti,system-reboot-controller;
mbox-names = "rx", "tx";
mboxes= <&secure_proxy 11>,
<&secure_proxy 13>;
k3_pds: power-controller {
compatible = "ti,sci-pm-domain";
#power-domain-cells = <1>;
};
k3_clks: clocks {
compatible = "ti,k2g-sci-clk";
#clock-cells = <2>;
};
k3_reset: reset-controller {
compatible = "ti,sci-reset";
#reset-cells = <2>;
};
k3_sysreset: sysreset-controller {
compatible = "ti,sci-sysreset";
};
};
main_pmx0: pinmux@11c000 {
compatible = "pinctrl-single";
reg = <0x11c000 0x2e4>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
};
main_pmx1: pinmux@11c2e8 {
compatible = "pinctrl-single";
reg = <0x11c2e8 0x24>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
};
main_uart0: serial@2800000 {
compatible = "ti,am654-uart", "ti,omap4-uart", "ns16550a";
reg = <0x02800000 0x100>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
current-speed = <115200>;
status = "disabled";
u-boot,dm-pre-reloc;
};
sdhci0: sdhci@04F80000 {
compatible = "arasan,sdhci-5.1";
reg = <0x4F80000 0x1000>,
<0x4F90000 0x400>;
clocks = <&k3_clks 47 1>;
power-domains = <&k3_pds 47>;
max-frequency = <25000000>;
};
sdhci1: sdhci@04FA0000 {
compatible = "arasan,sdhci-5.1";
reg = <0x4FA0000 0x1000>,
<0x4FB0000 0x400>;
clocks = <&k3_clks 48 1>;
power-domains = <&k3_pds 48>;
max-frequency = <25000000>;
};
};
&secure_proxy {
u-boot,dm-spl;
};
&dmsc {
u-boot,dm-spl;
};
&k3_pds {
u-boot,dm-spl;
};
&k3_clks {
u-boot,dm-spl;
};
&k3_reset {
u-boot,dm-spl;
};
&main_pmx0 {
u-boot,dm-spl;
main_uart0_pins_default: main_uart0_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x01e4, PIN_INPUT | MUX_MODE0) /* (AF11) UART0_RXD */
AM65X_IOPAD(0x01e8, PIN_OUTPUT | MUX_MODE0) /* (AE11) UART0_TXD */
AM65X_IOPAD(0x01ec, PIN_INPUT | MUX_MODE0) /* (AG11) UART0_CTSn */
AM65X_IOPAD(0x01f0, PIN_OUTPUT | MUX_MODE0) /* (AD11) UART0_RTSn */
>;
};
main_mmc0_pins_default: main_mmc0_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* (B25) MMC0_CLK */
AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP | MUX_MODE0) /* (B27) MMC0_CMD */
AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP | MUX_MODE0) /* (A26) MMC0_DAT0 */
AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP | MUX_MODE0) /* (E25) MMC0_DAT1 */
AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP | MUX_MODE0) /* (C26) MMC0_DAT2 */
AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP | MUX_MODE0) /* (A25) MMC0_DAT3 */
AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP | MUX_MODE0) /* (E24) MMC0_DAT4 */
AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP | MUX_MODE0) /* (A24) MMC0_DAT5 */
AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP | MUX_MODE0) /* (B26) MMC0_DAT6 */
AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP | MUX_MODE0) /* (D25) MMC0_DAT7 */
AM65X_IOPAD(0x01b0, PIN_INPUT | MUX_MODE0) /* (C25) MMC0_DS */
>;
};
main_mmc1_pins_default: main_mmc1_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* (C27) MMC1_CLK */
AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP | MUX_MODE0) /* (C28) MMC1_CMD */
AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP | MUX_MODE0) /* (D28) MMC1_DAT0 */
AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP | MUX_MODE0) /* (E27) MMC1_DAT1 */
AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP | MUX_MODE0) /* (D26) MMC1_DAT2 */
AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP | MUX_MODE0) /* (D27) MMC1_DAT3 */
AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP | MUX_MODE0) /* (B24) MMC1_SDCD */
AM65X_IOPAD(0x02e0, PIN_INPUT | MUX_MODE0) /* (C24) MMC1_SDWP */
>;
};
};
&main_pmx1 {
u-boot,dm-spl;
};
&main_uart0 {
u-boot,dm-spl;
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
status = "okay";
};
&sdhci0 {
u-boot,dm-spl;
status = "okay";
non-removable;
bus-width = <8>;
pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>;
};
&sdhci1 {
u-boot,dm-spl;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
sdhci-caps-mask = <0x7 0x0>;
};