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d6cb09d89d
Some devices enumerate various clocks in their DT, and many drivers just blanketly try to enable all of them. This creates problems since we only model a few gate clocks, and the clock driver outputs a warning when a clock is not described: ========= sunxi_set_gate: (CLK#3) unhandled ========= Some clocks don't have an enable bit, or are already enabled in a different way, so we might want to just ignore them. Add a CCU_CLK_F_DUMMY_GATE flag that indicates that case, and define a GATE_DUMMY macro that can be used in the clock description array. Define a few clocks, used by some pinctrl devices, that way to suppress the runtime warnings. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org>
103 lines
1.8 KiB
C
103 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Amarula Solutions.
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* Author: Jagan Teki <jagan@amarulasolutions.com>
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*/
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#ifndef _CLK_SUNXI_H
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#define _CLK_SUNXI_H
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#include <linux/bitops.h>
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/**
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* enum ccu_flags - ccu clock/reset flags
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*
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* @CCU_CLK_F_IS_VALID: is given clock gate is valid?
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* @CCU_RST_F_IS_VALID: is given reset control is valid?
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*/
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enum ccu_flags {
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CCU_CLK_F_IS_VALID = BIT(0),
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CCU_RST_F_IS_VALID = BIT(1),
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CCU_CLK_F_DUMMY_GATE = BIT(2),
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};
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/**
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* struct ccu_clk_gate - ccu clock gate
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* @off: gate offset
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* @bit: gate bit
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* @flags: ccu clock gate flags
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*/
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struct ccu_clk_gate {
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u16 off;
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u32 bit;
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enum ccu_flags flags;
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};
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#define GATE(_off, _bit) { \
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.off = _off, \
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.bit = _bit, \
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.flags = CCU_CLK_F_IS_VALID, \
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}
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#define GATE_DUMMY { \
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.flags = CCU_CLK_F_DUMMY_GATE, \
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}
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/**
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* struct ccu_reset - ccu reset
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* @off: reset offset
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* @bit: reset bit
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* @flags: ccu reset control flags
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*/
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struct ccu_reset {
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u16 off;
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u32 bit;
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enum ccu_flags flags;
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};
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#define RESET(_off, _bit) { \
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.off = _off, \
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.bit = _bit, \
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.flags = CCU_RST_F_IS_VALID, \
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}
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/**
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* struct ccu_desc - clock control unit descriptor
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*
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* @gates: clock gates
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* @resets: reset unit
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*/
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struct ccu_desc {
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const struct ccu_clk_gate *gates;
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const struct ccu_reset *resets;
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};
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/**
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* struct ccu_priv - sunxi clock control unit
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*
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* @base: base address
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* @desc: ccu descriptor
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*/
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struct ccu_priv {
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void *base;
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const struct ccu_desc *desc;
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};
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/**
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* sunxi_clk_probe - common sunxi clock probe
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* @dev: clock device
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*/
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int sunxi_clk_probe(struct udevice *dev);
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extern struct clk_ops sunxi_clk_ops;
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/**
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* sunxi_reset_bind() - reset binding
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*
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* @dev: reset device
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* @count: reset count
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* Return: 0 success, or error value
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*/
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int sunxi_reset_bind(struct udevice *dev, ulong count);
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#endif /* _CLK_SUNXI_H */
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