Xiubo Li 290e6e921f ls1021a: adding a secondary core boot address and kick functions ... Define the board specific smp_set_cpu_boot_addr() function to set the start address for secondary cores in the LS1021A specific manner. Define the board specific smp_kick_all_cpus() functioin to boot a secondary core. Here the BRR contains control bits for enabling boot for each core. On exiting HRESET or PORESET, the RCW BOOT_HO field optionally allows for logical core 0 to be released for booting or to remain in boot holdoff. All other cores remain in boot holdoff until their corresponding bit is set. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>		2014-12-11 09:41:53 -08:00
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clock.c	arm: ls102xa: Add Freescale LS102xA SoC support	2014-09-08 10:30:32 -07:00
cpu.c	ls1021a: adding a secondary core boot address and kick functions	2014-12-11 09:41:53 -08:00
fdt.c	arm: ls102xa: fixed a bus frequency setting error	2014-12-11 09:35:09 -08:00
fsl_epu.c	arm: ls102xa: clear EPU registers for deep sleep	2014-12-11 09:35:42 -08:00
fsl_epu.h	arm: ls102xa: clear EPU registers for deep sleep	2014-12-11 09:35:42 -08:00
fsl_ls1_serdes.c	arm: ls102xa: Add Freescale LS102xA SoC support	2014-09-08 10:30:32 -07:00
fsl_ls1_serdes.h	arm: ls102xa: Add Freescale LS102xA SoC support	2014-09-08 10:30:32 -07:00
ls102xa_serdes.c	arm: ls102xa: Add Freescale LS102xA SoC support	2014-09-08 10:30:32 -07:00
Makefile	arm: ls102xa: Add SD boot support for LS1021AQDS board	2014-12-11 09:39:22 -08:00
spl.c	arm: ls102xa: Add SD boot support for LS1021AQDS board	2014-12-11 09:39:22 -08:00
timer.c	arm: ls102xa: Add Freescale LS102xA SoC support	2014-09-08 10:30:32 -07:00