mirror of
https://github.com/AsahiLinux/u-boot
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ac6b362a25
This modification is NOT tested on any of the platforms modified as I dont have them. please help by testing+building+fixing Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
187 lines
6.6 KiB
C
187 lines
6.6 KiB
C
/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* 2003-2004 (c) MontaVista Software, Inc.
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*
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* Configuation settings for the ADS GraphicsClient+ board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* The ADS GCPlus Linux boot ROM loads U-Boot into RAM at 0xc0200000.
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* We don't actually init RAM in this case since we're using U-Boot as
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* an secondary boot loader during Linux kernel development and testing,
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* e.g. bootp/tftp download of the kernel is a far more convenient
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* when testing new kernels on this target. However the ADS GCPlus Linux
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* boot ROM leaves the MMU enabled when it passes control to U-Boot. So
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* we use lowlevel_init (!CONFIG_SKIP_LOWLEVEL_INIT) to remedy that problem.
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*/
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#undef CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SKIP_RELOCATE_UBOOT 1
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_SA1110 1 /* This is an SA1100 CPU */
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#define CONFIG_GCPLUS 1 /* on an ADS GCPlus Board */
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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/* we will never enable dcache, because we have to setup MMU first */
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#define CONFIG_SYS_NO_DCACHE
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size rsrvd for initial data */
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/*
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* Hardware drivers
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*/
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#define CONFIG_NET_MULTI
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#define CONFIG_LAN91C96 /* we have an SMC9194 on-board */
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#define CONFIG_LAN91C96_BASE 0x100e0000
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/*
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* select serial console configuration
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*/
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#define CONFIG_SA1100_SERIAL
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#define CONFIG_SERIAL3 1 /* we use SERIAL 3 on ADS GCPlus */
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 38400
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_DHCP
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTARGS "console=ttySA0,38400n8 mtdparts=sa1100-flash:1m@0(zImage),3m@1m(ramdisk.gz),12m@4m(userfs) root=/dev/nfs ip=bootp"
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#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
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#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 38400 /* speed to run kgdb serial port */
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#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "ADS GCPlus # " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
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#define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* default load address */
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#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
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#define CONFIG_SYS_CPUSPEED 0x0a /* set core clock to 206MHz */
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/* valid baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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#endif
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */
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#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
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#define PHYS_SDRAM_2 0xc8000000 /* SDRAM Bank #2 */
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#define PHYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */
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#define PHYS_FLASH_1 0x08000000 /* Flash Bank #1 */
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#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
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#define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */
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#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#if 1
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
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#else
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/* REVISIT: This doesn't work on ADS GCPlus just yet: */
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#define CONFIG_SYS_FLASH_CFI 1 /* flash is CFI conformant */
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#define CONFIG_FLASH_CFI_DRIVER 1 /* use common cfi driver */
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */
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#define CONFIG_SYS_FLASH_INCREMENT 0 /* there is only one bank */
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#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max # of sectors on one chip */
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/*#define CONFIG_SYS_FLASH_PROTECTION 1 /--* hardware flash protection */
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#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
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#endif
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE) /* Addr of Environment Sector */
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#define CONFIG_ENV_SIZE PHYS_FLASH_SECT_SIZE
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#endif /* __CONFIG_H */
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