u-boot/arch/riscv
Sean Anderson 924de3216e riscv: Add some comments to start.S
This adds comments regarding the ordering and purpose of certain
instructions as I understand them.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
2020-09-30 08:54:52 +08:00
..
cpu riscv: Add some comments to start.S 2020-09-30 08:54:52 +08:00
dts riscv: Update SiFive device tree for new CLINT driver 2020-09-30 08:54:46 +08:00
include/asm riscv: Use a valid bit to ignore already-pending IPIs 2020-09-30 08:54:52 +08:00
lib riscv: Ensure gp is NULL or points to valid data 2020-09-30 08:54:52 +08:00
config.mk kconfig / kbuild: Re-sync with Linux 4.19 2020-04-10 11:18:32 -04:00
Kconfig riscv: Rework Sifive CLINT as UCLASS_TIMER driver 2020-09-30 08:54:46 +08:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00