mirror of
https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
198 lines
5.7 KiB
C
198 lines
5.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
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*
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* Written-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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*/
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#include <common.h>
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#include <asm/io.h>
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#if defined(CONFIG_ORION5X)
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#include <asm/arch/orion5x.h>
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#elif defined(CONFIG_KIRKWOOD)
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#include <asm/arch/soc.h>
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#elif defined(CONFIG_ARCH_MVEBU)
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#include <linux/mbus.h>
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#endif
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/* SATA port registers */
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struct mvsata_port_registers {
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u32 reserved0[10];
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u32 edma_cmd;
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u32 reserved1[181];
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/* offset 0x300 : ATA Interface registers */
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u32 sstatus;
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u32 serror;
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u32 scontrol;
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u32 ltmode;
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u32 phymode3;
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u32 phymode4;
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u32 reserved2[5];
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u32 phymode1;
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u32 phymode2;
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u32 bist_cr;
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u32 bist_dw1;
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u32 bist_dw2;
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u32 serrorintrmask;
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};
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/*
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* Sanity checks:
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* - to compile at all, we need CONFIG_SYS_ATA_BASE_ADDR.
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* - for ide_preinit to make sense, we need at least one of
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* CONFIG_SYS_ATA_IDE0_OFFSET or CONFIG_SYS_ATA_IDE1_OFFSET;
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* - for ide_preinit to be called, we need CONFIG_IDE_PREINIT.
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* Fail with an explanation message if these conditions are not met.
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* This is particularly important for CONFIG_IDE_PREINIT, because
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* its lack would not cause a build error.
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*/
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#if !defined(CONFIG_SYS_ATA_BASE_ADDR)
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#error CONFIG_SYS_ATA_BASE_ADDR must be defined
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#elif !defined(CONFIG_SYS_ATA_IDE0_OFFSET) \
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&& !defined(CONFIG_SYS_ATA_IDE1_OFFSET)
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#error CONFIG_SYS_ATA_IDE0_OFFSET or CONFIG_SYS_ATA_IDE1_OFFSET \
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must be defined
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#elif !defined(CONFIG_IDE_PREINIT)
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#error CONFIG_IDE_PREINIT must be defined
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#endif
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/*
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* Masks and values for SControl DETection and Interface Power Management,
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* and for SStatus DETection.
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*/
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#define MVSATA_EDMA_CMD_ATA_RST 0x00000004
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#define MVSATA_SCONTROL_DET_MASK 0x0000000F
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#define MVSATA_SCONTROL_DET_NONE 0x00000000
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#define MVSATA_SCONTROL_DET_INIT 0x00000001
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#define MVSATA_SCONTROL_IPM_MASK 0x00000F00
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#define MVSATA_SCONTROL_IPM_NO_LP_ALLOWED 0x00000300
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#define MVSATA_SCONTROL_MASK \
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(MVSATA_SCONTROL_DET_MASK|MVSATA_SCONTROL_IPM_MASK)
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#define MVSATA_PORT_INIT \
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(MVSATA_SCONTROL_DET_INIT|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED)
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#define MVSATA_PORT_USE \
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(MVSATA_SCONTROL_DET_NONE|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED)
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#define MVSATA_SSTATUS_DET_MASK 0x0000000F
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#define MVSATA_SSTATUS_DET_DEVCOMM 0x00000003
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/*
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* Status codes to return to client callers. Currently, callers ignore
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* exact value and only care for zero or nonzero, so no need to make this
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* public, it is only #define'd for clarity.
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* If/when standard negative codes are implemented in U-Boot, then these
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* #defines should be moved to, or replaced by ones from, the common list
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* of status codes.
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*/
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#define MVSATA_STATUS_OK 0
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#define MVSATA_STATUS_TIMEOUT -1
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/*
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* Registers for SATA MBUS memory windows
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*/
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#define MVSATA_WIN_CONTROL(w) (MVEBU_AXP_SATA_BASE + 0x30 + ((w) << 4))
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#define MVSATA_WIN_BASE(w) (MVEBU_AXP_SATA_BASE + 0x34 + ((w) << 4))
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/*
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* Initialize SATA memory windows for Armada XP
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*/
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#ifdef CONFIG_ARCH_MVEBU
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static void mvsata_ide_conf_mbus_windows(void)
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{
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const struct mbus_dram_target_info *dram;
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int i;
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dram = mvebu_mbus_dram_info();
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/* Disable windows, Set Size/Base to 0 */
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for (i = 0; i < 4; i++) {
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writel(0, MVSATA_WIN_CONTROL(i));
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writel(0, MVSATA_WIN_BASE(i));
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}
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for (i = 0; i < dram->num_cs; i++) {
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const struct mbus_dram_window *cs = dram->cs + i;
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writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) |
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(dram->mbus_dram_target_id << 4) | 1,
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MVSATA_WIN_CONTROL(i));
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writel(cs->base & 0xffff0000, MVSATA_WIN_BASE(i));
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}
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}
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#endif
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/*
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* Initialize one MVSATAHC port: set SControl's IPM to "always active"
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* and DET to "reset", then wait for SStatus's DET to become "device and
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* comm ok" (or time out after 50 us if no device), then set SControl's
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* DET back to "no action".
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*/
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static int mvsata_ide_initialize_port(struct mvsata_port_registers *port)
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{
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u32 control;
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u32 status;
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u32 timeleft = 10000; /* wait at most 10 ms for SATA reset to complete */
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/* Hard reset */
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writel(MVSATA_EDMA_CMD_ATA_RST, &port->edma_cmd);
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udelay(25); /* taken from original marvell port */
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writel(0, &port->edma_cmd);
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/* Set control IPM to 3 (no low power) and DET to 1 (initialize) */
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control = readl(&port->scontrol);
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control = (control & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_INIT;
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writel(control, &port->scontrol);
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/* Toggle control DET back to 0 (normal operation) */
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control = (control & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_USE;
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writel(control, &port->scontrol);
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/* wait for status DET to become 3 (device and communication OK) */
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while (--timeleft) {
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status = readl(&port->sstatus) & MVSATA_SSTATUS_DET_MASK;
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if (status == MVSATA_SSTATUS_DET_DEVCOMM)
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break;
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udelay(1);
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}
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/* return success or time-out error depending on time left */
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if (!timeleft)
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return MVSATA_STATUS_TIMEOUT;
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return MVSATA_STATUS_OK;
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}
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/*
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* ide_preinit() will be called by ide_init in cmd_ide.c and will
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* reset the MVSTATHC ports needed by the board.
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*/
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int ide_preinit(void)
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{
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int ret = MVSATA_STATUS_TIMEOUT;
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int status;
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#ifdef CONFIG_ARCH_MVEBU
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mvsata_ide_conf_mbus_windows();
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#endif
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/* Enable ATA port 0 (could be SATA port 0 or 1) if declared */
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#if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
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status = mvsata_ide_initialize_port(
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(struct mvsata_port_registers *)
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(CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE0_OFFSET));
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if (status == MVSATA_STATUS_OK)
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ret = MVSATA_STATUS_OK;
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#endif
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/* Enable ATA port 1 (could be SATA port 0 or 1) if declared */
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#if defined(CONFIG_SYS_ATA_IDE1_OFFSET)
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status = mvsata_ide_initialize_port(
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(struct mvsata_port_registers *)
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(CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE1_OFFSET));
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if (status == MVSATA_STATUS_OK)
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ret = MVSATA_STATUS_OK;
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#endif
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/* Return success if at least one port initialization succeeded */
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return ret;
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}
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