mirror of
https://github.com/AsahiLinux/u-boot
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105 lines
2.6 KiB
C
105 lines
2.6 KiB
C
/*
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* (C) Copyright 2003
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* Thomas.Lange@corelatus.se
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <mach/au1x00.h>
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#include <asm/mipsregs.h>
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#include <asm/io.h>
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phys_size_t initdram(int board_type)
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{
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/* Sdram is setup by assembler code */
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/* If memory could be changed, we should return the true value here */
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return 64*1024*1024;
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}
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#define BCSR_PCMCIA_PC0DRVEN 0x0010
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#define BCSR_PCMCIA_PC0RST 0x0080
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/* In arch/mips/cpu/cpu.c */
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void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
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int checkboard (void)
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{
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#if defined(CONFIG_IDE_PCMCIA) && 0
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u16 status;
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#endif
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/* volatile u32 *pcmcia_bcsr = (u32*)(DB1000_BCSR_ADDR+0x10); */
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volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL;
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u32 proc_id;
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*sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */
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proc_id = read_c0_prid();
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switch (proc_id >> 24) {
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case 0:
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puts ("Board: Pb1000\n");
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printf ("CPU: Au1000 396 MHz, id: 0x%02x, rev: 0x%02x\n",
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(proc_id >> 8) & 0xFF, proc_id & 0xFF);
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break;
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case 1:
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puts ("Board: Pb1500\n");
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printf ("CPU: Au1500, id: 0x%02x, rev: 0x%02x\n",
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(proc_id >> 8) & 0xFF, proc_id & 0xFF);
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break;
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case 2:
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puts ("Board: Pb1100\n");
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printf ("CPU: Au1100, id: 0x%02x, rev: 0x%02x\n",
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(proc_id >> 8) & 0xFF, proc_id & 0xFF);
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break;
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default:
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printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
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}
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set_io_port_base(0);
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#if defined(CONFIG_IDE_PCMCIA) && 0
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/* Enable 3.3 V on slot 0 ( VCC )
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No 5V */
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status = 4;
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*pcmcia_bcsr = status;
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status |= BCSR_PCMCIA_PC0DRVEN;
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*pcmcia_bcsr = status;
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au_sync();
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udelay(300*1000);
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status |= BCSR_PCMCIA_PC0RST;
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*pcmcia_bcsr = status;
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au_sync();
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udelay(100*1000);
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/* PCMCIA is on a 36 bit physical address.
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We need to map it into a 32 bit addresses */
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#if 0
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/* We dont need theese unless we run whole pcmcia package */
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write_one_tlb(20, /* index */
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0x01ffe000, /* Pagemask, 16 MB pages */
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CONFIG_SYS_PCMCIA_IO_BASE, /* Hi */
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0x3C000017, /* Lo0 */
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0x3C200017); /* Lo1 */
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write_one_tlb(21, /* index */
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0x01ffe000, /* Pagemask, 16 MB pages */
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CONFIG_SYS_PCMCIA_ATTR_BASE, /* Hi */
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0x3D000017, /* Lo0 */
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0x3D200017); /* Lo1 */
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#endif /* 0 */
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write_one_tlb(22, /* index */
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0x01ffe000, /* Pagemask, 16 MB pages */
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CONFIG_SYS_PCMCIA_MEM_ADDR, /* Hi */
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0x3E000017, /* Lo0 */
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0x3E200017); /* Lo1 */
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#endif /* CONFIG_IDE_PCMCIA */
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return 0;
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}
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