u-boot/arch/arm/dts/socfpga_cyclone5_vining_fpga-u-boot.dtsi
Marek Vasut cf8c836788 watchdog: designware: Convert to DM and DT probing
Convert the designware watchdog timer driver to DM and add DT probing
support. Perform minor coding style clean up, like drop superfluous
braces. These ought to be no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Philipp Tomisch <philipp.tomisch@theobroma-systems.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc
2020-02-05 03:01:57 +01:00

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// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
* U-Boot additions
*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
* Copyright (c) 2018 Simon Goldschmidt
*/
#include "socfpga-common-u-boot.dtsi"
/{
aliases {
spi0 = "/soc/spi@ff705000";
udc0 = &usb0;
};
};
&watchdog0 {
status = "disabled";
};
&mmc {
status = "disabled";
};
&qspi {
u-boot,dm-pre-reloc;
n25q128@0 {
compatible = "n25q128", "jedec,spi-nor";
u-boot,dm-pre-reloc;
};
n25q00@1 {
compatible = "n25q00", "jedec,spi-nor";
u-boot,dm-pre-reloc;
};
};
&uart0 {
clock-frequency = <100000000>;
u-boot,dm-pre-reloc;
};
&uart1 {
clock-frequency = <100000000>;
};
&porta {
bank-name = "porta";
};
&portb {
bank-name = "portb";
};
&portc {
bank-name = "portc";
};
&watchdog0 {
u-boot,dm-pre-reloc;
};