mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-25 06:00:43 +00:00
5c64598bf7
To enable splash at A53 SPL, need to do memory map changes which
involves locate stack above malloc and have enough space to load bmp
image above stack. To load a 1920X1200 image a minimum of 8.8MB space is
needed, to support it move malloc down to 0x80b80000 from 0x80480000 and
bss to 0x80c80000 to have 1MB buffer between malloc and BSS.
Observed SPL size 195KB, CONFIG_SPL_SIZE_LIMIT set to 256KB.
Observed stack size 1904Bytes, CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK set
to 2KB.
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE config sets stack above the malloc
and reports for stack overflow.
Memory map at A53 SPL before splash screen
0x80000000+---------------------+
| Empty 512 KB |
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0x80080000+---------------------+
| Text Base |
| 352 KB |
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0x800D8000+---------------------+
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| Empty 3.6MB |
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0x80477660+---------------------+
| Stack 2 KB |
0x80477e60+---------------------+
| GD 416 Bytes |
0x80478000+---------------------+
| Malloc 352 KB |
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0x80480000+---------------------+
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| Empty 5.5 MB |
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0x80a00000+---------------------+
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| BSS 512 KB |
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0x80a80000+---------------------+
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| Empty 5.5 MB |
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0x81000000+---------------------+FIT Image load address
New memory map with splash screen at SPL
0x80000000+---------------------+
| Empty 512 KB |
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0x80080000+---------------------+
| Text Base |
| 352 KB |
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0x800D8000+---------------------+
| Empty 1.1MB |
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0x80200000+---------------------+
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| BMP Image Load |
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| 9.4 MB |
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0x80b77660+---------------------+
| Stack 2KB |
0x80b77e60+---------------------+
| GD 416 Bytes |
0x80b78000+---------------------+
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| Malloc 352KB |
0x80b80000+---------------------+
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| Empty 1 MB |
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0x80c80000+---------------------+
| BSS 512 KB |
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0x80d00000+---------------------+
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| Empty 3.0 MB |
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0x81000000+---------------------+FIT Image load addressi
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
104 lines
2.9 KiB
Text
104 lines
2.9 KiB
Text
CONFIG_ARM=y
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CONFIG_ARCH_K3=y
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CONFIG_TI_SECURE_DEVICE=y
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CONFIG_SYS_MALLOC_F_LEN=0x8000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_SOC_K3_AM625=y
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CONFIG_K3_ATF_LOAD_ADDR=0x9e780000
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CONFIG_TARGET_AM625_A53_EVM=y
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80b80000
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CONFIG_SF_DEFAULT_SPEED=25000000
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CONFIG_SPL_DM_SPI=y
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CONFIG_DEFAULT_DEVICE_TREE="k3-am625-sk"
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CONFIG_SPL_TEXT_BASE=0x80080000
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CONFIG_OF_LIBFDT_OVERLAY=y
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CONFIG_DM_RESET=y
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CONFIG_SPL_MMC=y
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CONFIG_SPL_SERIAL=y
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CONFIG_SPL_STACK_R_ADDR=0x82000000
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CONFIG_SPL_SIZE_LIMIT=0x40000
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CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800
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CONFIG_SPL_FS_FAT=y
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CONFIG_SPL_LIBDISK_SUPPORT=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern; setenv fdtfile ti/${name_fdt}; run distro_bootcmd"
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CONFIG_SPL_MAX_SIZE=0x58000
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0x80c80000
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CONFIG_SPL_BSS_MAX_SIZE=0x80000
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CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_STACK_R=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
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CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
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CONFIG_SPL_DM_MAILBOX=y
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CONFIG_SPL_DM_SPI_FLASH=y
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CONFIG_SPL_POWER_DOMAIN=y
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# CONFIG_SPL_SPI_FLASH_TINY is not set
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CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
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CONFIG_SPL_SPI_LOAD=y
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CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
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CONFIG_SPL_YMODEM_SUPPORT=y
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CONFIG_SYS_BOOTM_LEN=0x800000
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CONFIG_CMD_MMC=y
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_MULTI_DTB_FIT=y
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CONFIG_SPL_MULTI_DTB_FIT=y
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CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SPL_DM=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SPL_OF_TRANSLATE=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_CLK_TI_SCI=y
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CONFIG_DMA_CHANNELS=y
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CONFIG_TI_K3_NAVSS_UDMA=y
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CONFIG_TI_SCI_PROTOCOL=y
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CONFIG_DM_MAILBOX=y
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CONFIG_K3_SEC_PROXY=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_ADMA=y
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CONFIG_SPL_MMC_SDHCI_ADMA=y
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CONFIG_MMC_SDHCI_AM654=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_SFDP_SUPPORT=y
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CONFIG_SPI_FLASH_SOFT_RESET=y
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CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_S28HX_T=y
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CONFIG_PHY_TI_DP83867=y
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CONFIG_PHY_FIXED=y
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CONFIG_TI_AM65_CPSW_NUSS=y
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CONFIG_PHY=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_SINGLE=y
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CONFIG_POWER_DOMAIN=y
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CONFIG_TI_SCI_POWER_DOMAIN=y
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CONFIG_K3_SYSTEM_CONTROLLER=y
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CONFIG_REMOTEPROC_TI_K3_ARM64=y
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CONFIG_RESET_TI_SCI=y
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CONFIG_DM_SERIAL=y
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CONFIG_SOC_DEVICE=y
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CONFIG_SOC_DEVICE_TI_K3=y
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CONFIG_SOC_TI=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_CADENCE_QSPI=y
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CONFIG_SYSRESET=y
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CONFIG_SPL_SYSRESET=y
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CONFIG_SYSRESET_TI_SCI=y
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CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
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