mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-06 21:24:29 +00:00
f5e6c168c1
It adds a Driver Model compatible reset driver for HiSlicon platform. The driver implements a custom .of_xlate function, and uses .data field as reset register offset and .id field as bit shift. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
22 lines
872 B
Makefile
22 lines
872 B
Makefile
# SPDX-License-Identifier: GPL-2.0
|
|
#
|
|
# Copyright (c) 2016, NVIDIA CORPORATION.
|
|
#
|
|
|
|
obj-$(CONFIG_DM_RESET) += reset-uclass.o
|
|
obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset.o
|
|
obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o
|
|
obj-$(CONFIG_STI_RESET) += sti-reset.o
|
|
obj-$(CONFIG_STM32_RESET) += stm32-reset.o
|
|
obj-$(CONFIG_TEGRA_CAR_RESET) += tegra-car-reset.o
|
|
obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o
|
|
obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
|
|
obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
|
|
obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
|
|
obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o
|
|
obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o
|
|
obj-$(CONFIG_RESET_MESON) += reset-meson.o
|
|
obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
|
|
obj-$(CONFIG_RESET_MEDIATEK) += reset-mediatek.o
|
|
obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
|
|
obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o
|