u-boot/arch/arm/mach-socfpga/timer_s10.c
Chee Hong Ang 12cc44884b arm: socfpga: soc64: Initialize timer in SPL only
Timer only need to be initialized once in SPL.
This patch remove the redundancy of initializing the
timer again in U-Boot proper

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09 17:53:11 +08:00

28 lines
602 B
C

// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2017-2018 Intel Corporation <www.intel.com>
*
*/
#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/arch/timer.h>
/*
* Timer initialization
*/
int timer_init(void)
{
#ifdef CONFIG_SPL_BUILD
int enable = 0x3; /* timer enable + output signal masked */
int loadval = ~0;
/* enable system counter */
writel(enable, SOCFPGA_GTIMER_SEC_ADDRESS);
/* enable processor pysical counter */
asm volatile("msr cntp_ctl_el0, %0" : : "r" (enable));
asm volatile("msr cntp_tval_el0, %0" : : "r" (loadval));
#endif
return 0;
}