mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-06 13:14:27 +00:00
306881a0bf
This converts the following to Kconfig: CONFIG_PHYLIB CONFIG_BITBANGMII CONFIG_MV88E6352_SWITCH CONFIG_MV88E61XX_SWITCH CONFIG_PHYLIB_10G CONFIG_PHY_AQUANTIA CONFIG_PHY_ATHEROS CONFIG_PHY_BROADCOM CONFIG_PHY_CORTINA CONFIG_PHY_DAVICOM CONFIG_PHY_ET1011C CONFIG_PHY_LXT CONFIG_PHY_MARVELL CONFIG_PHY_MICREL CONFIG_PHY_NATSEMI CONFIG_PHY_REALTEK CONFIG_RTL8211X_PHY_FORCE_MASTER CONFIG_PHY_SMSC CONFIG_PHY_TERANETICS CONFIG_PHY_TI CONFIG_PHY_VITESSE CONFIG_PHY_XILINX Signed-off-by: Tom Rini <trini@konsulko.com>
209 lines
5 KiB
Text
209 lines
5 KiB
Text
CONFIG_PPC=y
|
|
CONFIG_SYS_TEXT_BASE=0xFE000000
|
|
CONFIG_SYS_MALLOC_F_LEN=0x600
|
|
CONFIG_ENV_SIZE=0x2000
|
|
CONFIG_ENV_SECT_SIZE=0x10000
|
|
CONFIG_DM_GPIO=y
|
|
CONFIG_IDENT_STRING=" gazerbeam 0.01"
|
|
CONFIG_SYS_CLK_FREQ=33333333
|
|
CONFIG_MPC83xx=y
|
|
CONFIG_TARGET_GAZERBEAM=y
|
|
CONFIG_SYSTEM_PLL_VCO_DIV_2=y
|
|
CONFIG_SYSTEM_PLL_FACTOR_4_1=y
|
|
CONFIG_CORE_PLL_RATIO_3_1=y
|
|
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
|
|
CONFIG_TSEC1_MODE_RGMII=y
|
|
CONFIG_TSEC2_MODE_RGMII=y
|
|
CONFIG_BAT0=y
|
|
CONFIG_BAT0_NAME="SDRAM"
|
|
CONFIG_BAT0_BASE=0x00000000
|
|
CONFIG_BAT0_LENGTH_128_MBYTES=y
|
|
CONFIG_BAT0_ACCESS_RW=y
|
|
CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
|
|
CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
|
|
CONFIG_BAT0_USER_MODE_VALID=y
|
|
CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
|
|
CONFIG_BAT1=y
|
|
CONFIG_BAT1_NAME="IMMR"
|
|
CONFIG_BAT1_BASE=0xE0000000
|
|
CONFIG_BAT1_LENGTH_8_MBYTES=y
|
|
CONFIG_BAT1_ACCESS_RW=y
|
|
CONFIG_BAT1_ICACHE_INHIBITED=y
|
|
CONFIG_BAT1_ICACHE_GUARDED=y
|
|
CONFIG_BAT1_DCACHE_INHIBITED=y
|
|
CONFIG_BAT1_DCACHE_GUARDED=y
|
|
CONFIG_BAT1_USER_MODE_VALID=y
|
|
CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
|
|
CONFIG_BAT2=y
|
|
CONFIG_BAT2_NAME="FLASH"
|
|
CONFIG_BAT2_BASE=0xFE000000
|
|
CONFIG_BAT2_LENGTH_8_MBYTES=y
|
|
CONFIG_BAT2_ACCESS_RW=y
|
|
CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
|
|
CONFIG_BAT2_DCACHE_INHIBITED=y
|
|
CONFIG_BAT2_DCACHE_GUARDED=y
|
|
CONFIG_BAT2_USER_MODE_VALID=y
|
|
CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
|
|
CONFIG_BAT3=y
|
|
CONFIG_BAT3_NAME="INIT_RAM"
|
|
CONFIG_BAT3_BASE=0xE6000000
|
|
CONFIG_BAT3_ACCESS_RW=y
|
|
CONFIG_BAT3_USER_MODE_VALID=y
|
|
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
|
|
CONFIG_LBLAW0=y
|
|
CONFIG_LBLAW0_BASE=0xFE000000
|
|
CONFIG_LBLAW0_NAME="FLASH"
|
|
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
|
|
CONFIG_LBLAW1=y
|
|
CONFIG_LBLAW1_BASE=0xE0600000
|
|
CONFIG_LBLAW1_NAME="FPGA0"
|
|
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
|
|
CONFIG_LBLAW2=y
|
|
CONFIG_LBLAW2_BASE=0xE0700000
|
|
CONFIG_LBLAW2_NAME="FPGA1"
|
|
CONFIG_LBLAW2_LENGTH_1_MBYTES=y
|
|
CONFIG_ELBC_BR0_OR0=y
|
|
CONFIG_BR0_OR0_NAME="FLASH"
|
|
CONFIG_BR0_OR0_BASE=0xFE000000
|
|
CONFIG_BR0_PORTSIZE_16BIT=y
|
|
CONFIG_OR0_AM_8_MBYTES=y
|
|
CONFIG_OR0_SCY_15=y
|
|
CONFIG_OR0_CSNT_EARLIER=y
|
|
CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
|
|
CONFIG_OR0_XACS_EXTENDED=y
|
|
CONFIG_OR0_TRLX_RELAXED=y
|
|
CONFIG_OR0_EHTR_8_CYCLE=y
|
|
CONFIG_ELBC_BR1_OR1=y
|
|
CONFIG_BR1_OR1_NAME="FPGA0"
|
|
CONFIG_BR1_OR1_BASE=0xE0600000
|
|
CONFIG_BR1_PORTSIZE_16BIT=y
|
|
CONFIG_OR1_AM_1_MBYTES=y
|
|
CONFIG_OR1_SCY_5=y
|
|
CONFIG_OR1_CSNT_EARLIER=y
|
|
CONFIG_ELBC_BR2_OR2=y
|
|
CONFIG_BR2_OR2_NAME="FPGA1"
|
|
CONFIG_BR2_OR2_BASE=0xE0700000
|
|
CONFIG_BR2_PORTSIZE_16BIT=y
|
|
CONFIG_OR2_AM_1_MBYTES=y
|
|
CONFIG_OR2_SCY_5=y
|
|
CONFIG_OR2_CSNT_EARLIER=y
|
|
CONFIG_HID0_FINAL_EMCP=y
|
|
CONFIG_HID0_FINAL_DPM=y
|
|
CONFIG_HID0_FINAL_ICE=y
|
|
CONFIG_HID2_HBE=y
|
|
CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y
|
|
CONFIG_SICR_GPIO_A_TSEC2=y
|
|
CONFIG_SICR_GPIO_B_TSEC_GTX_CLK125=y
|
|
CONFIG_SICR_IEEE1588_A_GPIO=y
|
|
CONFIG_SICR_GTM_GPIO=y
|
|
CONFIG_SICR_ETSEC2_GPIO=y
|
|
CONFIG_SICR_GPIOSEL_IEEE1588=y
|
|
CONFIG_SICR_TMSOBI1_2_5_V=y
|
|
CONFIG_SICR_TMSOBI2_2_5_V=y
|
|
CONFIG_ACR_PIPE_DEP_4=y
|
|
CONFIG_ACR_RPTCNT_4=y
|
|
CONFIG_SPCR_TSECEP_3=y
|
|
CONFIG_LCRR_DBYP_PLL_BYPASSED=y
|
|
CONFIG_LCRR_CLKDIV_2=y
|
|
CONFIG_SYS_FPGA_FLAVOR_GAZERBEAM=y
|
|
CONFIG_CMD_IOLOOP=y
|
|
CONFIG_FIT=y
|
|
CONFIG_FIT_SIGNATURE=y
|
|
CONFIG_FIT_VERBOSE=y
|
|
CONFIG_OF_BOARD_SETUP=y
|
|
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
|
CONFIG_BOOTDELAY=5
|
|
# CONFIG_CONSOLE_MUX is not set
|
|
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
|
CONFIG_DISPLAY_CPUINFO=y
|
|
# CONFIG_DISPLAY_BOARDINFO is not set
|
|
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
CONFIG_BOARD_EARLY_INIT_R=y
|
|
CONFIG_LAST_STAGE_INIT=y
|
|
CONFIG_HUSH_PARSER=y
|
|
CONFIG_AUTOBOOT_KEYED=y
|
|
CONFIG_AUTOBOOT_STOP_STR=" "
|
|
CONFIG_CMD_CPU=y
|
|
CONFIG_CMD_BINOP=y
|
|
CONFIG_CMD_MEMTEST=y
|
|
CONFIG_SYS_ALT_MEMTEST=y
|
|
CONFIG_CMD_GPIO=y
|
|
CONFIG_CMD_I2C=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_AXI=y
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
# CONFIG_CMD_NFS is not set
|
|
CONFIG_CMD_MII=y
|
|
CONFIG_CMD_PING=y
|
|
CONFIG_CMD_CACHE=y
|
|
CONFIG_CMD_HASH=y
|
|
CONFIG_CMD_TPM=y
|
|
CONFIG_CMD_EXT2=y
|
|
CONFIG_DOS_PARTITION=y
|
|
CONFIG_OF_CONTROL=y
|
|
CONFIG_OF_LIVE=y
|
|
CONFIG_DEFAULT_DEVICE_TREE="gazerbeam"
|
|
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
|
CONFIG_ENV_ADDR=0xFE080000
|
|
CONFIG_ENV_ADDR_REDUND=0xFE090000
|
|
CONFIG_DM=y
|
|
CONFIG_REGMAP=y
|
|
CONFIG_AXI=y
|
|
CONFIG_IHS_AXI=y
|
|
CONFIG_CLK=y
|
|
CONFIG_ICS8N3QV01=y
|
|
CONFIG_CPU=y
|
|
CONFIG_CPU_MPC83XX=y
|
|
CONFIG_BOARD=y
|
|
CONFIG_BOARD_GAZERBEAM=y
|
|
CONFIG_DM_PCA953X=y
|
|
CONFIG_MPC8XXX_GPIO=y
|
|
CONFIG_DM_I2C=y
|
|
CONFIG_SYS_I2C_FSL=y
|
|
CONFIG_SYS_I2C_IHS=y
|
|
CONFIG_MISC=y
|
|
CONFIG_GDSYS_RXAUI_CTRL=y
|
|
CONFIG_GDSYS_IOEP=y
|
|
CONFIG_MPC83XX_SERDES=y
|
|
CONFIG_GDSYS_SOC=y
|
|
CONFIG_IHS_FPGA=y
|
|
CONFIG_DM_MMC=y
|
|
CONFIG_FSL_ESDHC=y
|
|
CONFIG_DM_MTD=y
|
|
CONFIG_MTD_NOR_FLASH=y
|
|
CONFIG_FLASH_CFI_DRIVER=y
|
|
CONFIG_CFI_FLASH=y
|
|
CONFIG_SYS_FLASH_PROTECTION=y
|
|
CONFIG_SYS_FLASH_CFI=y
|
|
CONFIG_PHYLIB_10G=y
|
|
CONFIG_PHY_ATHEROS=y
|
|
CONFIG_PHY_BROADCOM=y
|
|
CONFIG_PHY_DAVICOM=y
|
|
CONFIG_PHY_LXT=y
|
|
CONFIG_PHY_MARVELL=y
|
|
CONFIG_PHY_NATSEMI=y
|
|
CONFIG_PHY_REALTEK=y
|
|
CONFIG_PHY_SMSC=y
|
|
CONFIG_PHY_TERANETICS=y
|
|
CONFIG_PHY_VITESSE=y
|
|
CONFIG_DM_ETH=y
|
|
CONFIG_TSEC_ENET=y
|
|
# CONFIG_PCI is not set
|
|
CONFIG_RAM=y
|
|
CONFIG_MPC83XX_SDRAM=y
|
|
CONFIG_DM_RESET=y
|
|
CONFIG_DM_SERIAL=y
|
|
CONFIG_SYS_NS16550=y
|
|
CONFIG_SYSRESET=y
|
|
CONFIG_SYSRESET_MPC83XX=y
|
|
CONFIG_TIMER=y
|
|
CONFIG_MPC83XX_TIMER=y
|
|
CONFIG_TPM_ATMEL_TWI=y
|
|
CONFIG_TPM_AUTH_SESSIONS=y
|
|
# CONFIG_TPM_V2 is not set
|
|
CONFIG_DM_VIDEO=y
|
|
CONFIG_DISPLAY=y
|
|
CONFIG_LOGICORE_DP_TX=y
|
|
CONFIG_OSD=y
|
|
CONFIG_IHS_VIDEO_OUT=y
|
|
CONFIG_TPM=y
|