mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 15:14:43 +00:00
8f74e659c4
Due to how the Makefile logic is we currently get DM_SPI support in SPL enabled by having DM_SPI enabled for full U-Boot but not having CONFIG_SPL_DM_SPI set. Add this missing option to boards that were inadvertently making use of it. Cc: Adam Ford <aford173@gmail.com> Cc: Akash Gajjar <akash@openedev.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Andy Yan <andy.yan@rock-chips.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Chee Hong Ang <chee.hong.ang@intel.com> Cc: Chin-Liang See <clsee@altera.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com> Cc: Heiko Schocher <hs@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Klaus Goger <klaus.goger@theobroma-systems.com> Cc: Levin Du <djw@t-chip.com.cn> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Luca Ceresoli <luca@lucaceresoli.net> Cc: Marek Vasut <marex@denx.de> Cc: Michal Simek <monstr@monstr.eu> Cc: Mike Looijmans <mike.looijmans@topic.nl> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Pavel Machek <pavel@denx.de> Cc: Peter Robinson <pbrobinson@gmail.com> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: Suniel Mahesh <sunil@amarulasolutions.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Wolfgang Grandegger <wg@aries-embedded.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
77 lines
1.8 KiB
Text
77 lines
1.8 KiB
Text
CONFIG_X86=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ENV_SIZE=0x1000
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_ENV_SECT_SIZE=0x1000
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CONFIG_SPL_DM_SPI=y
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CONFIG_NR_DRAM_BANKS=8
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CONFIG_DEBUG_UART_BOARD_INIT=y
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CONFIG_DEBUG_UART_BASE=0x3f8
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CONFIG_DEBUG_UART_CLOCK=1843200
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CONFIG_SPL_TEXT_BASE=0xfffd0000
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CONFIG_X86_RUN_64BIT=y
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CONFIG_VENDOR_GOOGLE=y
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CONFIG_TARGET_CHROMEBOOK_LINK64=y
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CONFIG_DEBUG_UART=y
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CONFIG_HAVE_MRC=y
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CONFIG_SMP=y
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CONFIG_HAVE_VGA_BIOS=y
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CONFIG_FIT=y
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_BOOTSTAGE=y
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CONFIG_BOOTSTAGE_REPORT=y
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CONFIG_SHOW_BOOT_PROGRESS=y
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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CONFIG_MISC_INIT_R=y
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_LAST_STAGE_INIT=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_CPU_SUPPORT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_NET_SUPPORT=y
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CONFIG_SPL_PCI=y
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CONFIG_SPL_PCH_SUPPORT=y
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CONFIG_SPL_RTC_SUPPORT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_CPU=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_PING=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_BOOTSTAGE=y
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CONFIG_CMD_TPM=y
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CONFIG_CMD_TPM_TEST=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_CPU=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_INTEL=y
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CONFIG_CROS_EC=y
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CONFIG_CROS_EC_LPC=y
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CONFIG_SPL_DM_RTC=y
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CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_TPM_TIS_LPC=y
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CONFIG_USB_STORAGE=y
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CONFIG_USB_KEYBOARD=y
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CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
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CONFIG_FRAMEBUFFER_VESA_MODE_11A=y
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CONFIG_VIDEO_IVYBRIDGE_IGD=y
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CONFIG_CONSOLE_SCROLL_LINES=5
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CONFIG_CMD_DHRYSTONE=y
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CONFIG_TPM=y
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# CONFIG_GZIP is not set
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