mirror of
https://github.com/AsahiLinux/u-boot
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394d64e45b
Add peripherial id for pwm inorder to support generic api to get the clk frequency Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
74 lines
1.9 KiB
C
74 lines
1.9 KiB
C
/*
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* Copyright (C) 2012 Samsung Electronics
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* Rajeshwari Shinde <rajeshwari.s@samsung.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __ASM_ARM_ARCH_PERIPH_H
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#define __ASM_ARM_ARCH_PERIPH_H
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/*
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* Peripherals required for pinmux configuration. List will
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* grow with support for more devices getting added.
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* Numbering based on interrupt table.
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*
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*/
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enum periph_id {
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PERIPH_ID_UART0 = 51,
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PERIPH_ID_UART1,
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PERIPH_ID_UART2,
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PERIPH_ID_UART3,
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PERIPH_ID_I2C0 = 56,
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PERIPH_ID_I2C1,
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PERIPH_ID_I2C2,
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PERIPH_ID_I2C3,
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PERIPH_ID_I2C4,
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PERIPH_ID_I2C5,
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PERIPH_ID_I2C6,
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PERIPH_ID_I2C7,
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PERIPH_ID_SPI0 = 68,
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PERIPH_ID_SPI1,
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PERIPH_ID_SPI2,
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PERIPH_ID_SDMMC0 = 75,
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PERIPH_ID_SDMMC1,
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PERIPH_ID_SDMMC2,
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PERIPH_ID_SDMMC3,
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PERIPH_ID_I2S1 = 99,
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/* Since following peripherals do
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* not have shared peripheral interrupts (SPIs)
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* they are numbered arbitiraly after the maximum
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* SPIs Exynos has (128)
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*/
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PERIPH_ID_SROMC = 128,
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PERIPH_ID_SPI3,
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PERIPH_ID_SPI4,
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PERIPH_ID_SDMMC4,
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PERIPH_ID_PWM0,
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PERIPH_ID_PWM1,
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PERIPH_ID_PWM2,
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PERIPH_ID_PWM3,
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PERIPH_ID_PWM4,
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PERIPH_ID_COUNT,
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PERIPH_ID_NONE = -1,
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};
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#endif /* __ASM_ARM_ARCH_PERIPH_H */
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