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33f4750783
Add the core architecture code for the rk3066. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
55 lines
1.3 KiB
C
55 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include <log.h>
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#include <syscon.h>
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#include <asm/arch-rockchip/clock.h>
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static const struct udevice_id rk3066_syscon_ids[] = {
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{ .compatible = "rockchip,rk3066-noc", .data = ROCKCHIP_SYSCON_NOC },
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{ .compatible = "rockchip,rk3066-grf", .data = ROCKCHIP_SYSCON_GRF },
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{ .compatible = "rockchip,rk3066-pmu", .data = ROCKCHIP_SYSCON_PMU },
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{ }
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};
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U_BOOT_DRIVER(syscon_rk3066) = {
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.name = "rk3066_syscon",
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.id = UCLASS_SYSCON,
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.of_match = rk3066_syscon_ids,
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};
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#if CONFIG_IS_ENABLED(OF_PLATDATA)
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static int rk3066_syscon_bind_of_plat(struct udevice *dev)
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{
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dev->driver_data = dev->driver->of_match->data;
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debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
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return 0;
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}
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U_BOOT_DRIVER(rockchip_rk3066_noc) = {
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.name = "rockchip_rk3066_noc",
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.id = UCLASS_SYSCON,
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.of_match = rk3066_syscon_ids,
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.bind = rk3066_syscon_bind_of_plat,
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};
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U_BOOT_DRIVER(rockchip_rk3066_grf) = {
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.name = "rockchip_rk3066_grf",
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.id = UCLASS_SYSCON,
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.of_match = rk3066_syscon_ids + 1,
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.bind = rk3066_syscon_bind_of_plat,
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};
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U_BOOT_DRIVER(rockchip_rk3066_pmu) = {
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.name = "rockchip_rk3066_pmu",
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.id = UCLASS_SYSCON,
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.of_match = rk3066_syscon_ids + 2,
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.bind = rk3066_syscon_bind_of_plat,
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};
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#endif
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