mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-08 22:24:32 +00:00
ef9f65f389
Add bit indexes for reset signals within the PRCI module on FU540-C000 SoC. The DDR and ethernet sub-system's have reset signals indicated by these reset indexes. Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
19 lines
503 B
C
19 lines
503 B
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Copyright (C) 2020 Sifive, Inc.
|
|
* Author: Sagar Kadam <sagar.kadam@sifive.com>
|
|
*/
|
|
|
|
#ifndef __DT_BINDINGS_RESET_SIFIVE_FU540_PRCI_H
|
|
#define __DT_BINDINGS_RESET_SIFIVE_FU540_PRCI_H
|
|
|
|
/* Reset indexes for use by device tree data and the PRCI driver */
|
|
#define PRCI_RST_DDR_CTRL_N 0
|
|
#define PRCI_RST_DDR_AXI_N 1
|
|
#define PRCI_RST_DDR_AHB_N 2
|
|
#define PRCI_RST_DDR_PHY_N 3
|
|
/* bit 4 is reserved bit */
|
|
#define PRCI_RST_RSVD_N 4
|
|
#define PRCI_RST_GEMGXL_N 5
|
|
|
|
#endif
|