Marek Vasut 8eccde3ebb ddr: altera: Internal scc_mgr_apply_group_all_out_delay_add() cleanup part 1 ... Apparently, in case of the DQ and DM, the value if the new_delay variable is calculated, but the value is not used. Zap the entire code which does calculate the value. It is not clear to me whether or not the code is doing the right thing in the first place. Right now, it calls scc_mgr_load_dq() and scc_mgr_load_dm() respectively, but I suspect it might need to call scc_mgr_apply_group_dq_out1_delay() and scc_mgr_apply_group_dm_out1_delay() instead. This is something Altera must investigate. Signed-off-by: Marek Vasut <marex@denx.de>		2015-08-08 14:14:13 +02:00
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altera	ddr: altera: Internal scc_mgr_apply_group_all_out_delay_add() cleanup part 1	2015-08-08 14:14:13 +02:00
fsl	drivers/ddr/fsl: Adjust bstopre value	2015-08-03 12:06:38 -07:00
marvell	arm: mvebu: a38x: Use correct PEX register access macros	2015-07-23 10:39:25 +02:00