mirror of
https://github.com/AsahiLinux/u-boot
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d8ccbe93b5
U-Boot SPL 2016.03-rc3-00019-g6dfb4c2-dirty (Mar 09 2016 - 07:40:06)
SHC C3-Sample
MPU reference clock runs at 6 MHz
Setting MPU clock to 594 MHz
Enabling Spread Spectrum of 18 permille for MPU
Trying to boot from MMC
reading u-boot.img
reading u-boot.img
U-Boot 2016.03-rc3-00019-g6dfb4c2-dirty (Mar 09 2016 - 07:05:35 +0100)
Watchdog enabled
I2C: ready
DRAM: 512 MiB
reloc off 1f783000
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
Net: cpsw
U-Boot#
Signed-off-by: Heiko Schocher <hs@denx.de>
187 lines
4.7 KiB
C
187 lines
4.7 KiB
C
/*
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* board.h
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*
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* (C) Copyright 2016
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* Based on:
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* TI AM335x boards information header
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/* Definition to control the GPIOs (for LEDs and Reset) */
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#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
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static inline int board_is_b_sample(void)
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{
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#if defined CONFIG_B_SAMPLE
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return 1;
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#else
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return 0;
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#endif
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}
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static inline int board_is_c_sample(void)
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{
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#if defined CONFIG_C_SAMPLE
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return 1;
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#else
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return 0;
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#endif
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}
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static inline int board_is_c3_sample(void)
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{
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#if defined CONFIG_C3_SAMPLE
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return 1;
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#else
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return 0;
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#endif
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}
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static inline int board_is_series(void)
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{
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#if defined CONFIG_SERIES
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return 1;
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#else
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return 0;
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#endif
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}
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/*
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* Definitions for pinmuxing header and Board ID strings
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*/
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#if defined CONFIG_B_SAMPLE
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# define BOARD_ID_STR "SHC B-Sample\n"
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#elif defined CONFIG_B2_SAMPLE
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# define BOARD_ID_STR "SHC B2-Sample\n"
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#elif defined CONFIG_C_SAMPLE
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# if defined(CONFIG_SHC_NETBOOT)
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# define BOARD_ID_STR "#### NETBOOT ####\nSHC C-Sample\n"
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# elif defined(CONFIG_SHC_SDBOOT)
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# define BOARD_ID_STR "#### SDBOOT ####\nSHC C-Sample\n"
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# else
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# define BOARD_ID_STR "SHC C-Sample\n"
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# endif
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#elif defined CONFIG_C2_SAMPLE
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# if defined(CONFIG_SHC_ICT)
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# define BOARD_ID_STR "#### ICT ####\nSHC C2-Sample\n"
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# elif defined(CONFIG_SHC_NETBOOT)
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# define BOARD_ID_STR "#### NETBOOT ####\nSHC C2-Sample\n"
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# elif defined(CONFIG_SHC_SDBOOT)
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# define BOARD_ID_STR "#### SDBOOT ####\nSHC C2-Sample\n"
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# else
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# define BOARD_ID_STR "SHC C2-Sample\n"
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# endif
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#elif defined CONFIG_C3_SAMPLE
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# if defined(CONFIG_SHC_ICT)
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# define BOARD_ID_STR "#### ICT ####\nSHC C3-Sample\n"
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# elif defined(CONFIG_SHC_NETBOOT)
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# define BOARD_ID_STR "#### NETBOOT ####\nSHC C3-Sample\n"
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# elif defined(CONFIG_SHC_SDBOOT)
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# define BOARD_ID_STR "#### SDBOOT ####\nSHC C3-Sample\n"
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# else
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# define BOARD_ID_STR "SHC C3-Sample\n"
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# endif
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#elif defined CONFIG_SERIES
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# if defined(CONFIG_SHC_ICT)
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# define BOARD_ID_STR "#### ICT ####\nSHC\n"
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# elif defined(CONFIG_SHC_NETBOOT)
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# define BOARD_ID_STR "#### NETBOOT ####\nSHC\n"
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# elif defined(CONFIG_SHC_SDBOOT)
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# define BOARD_ID_STR "#### SDBOOT ####\nSHC\n"
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# else
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# define BOARD_ID_STR "SHC\n"
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# endif
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#else
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# define BOARD_ID_STR "Unknown device!\n"
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#endif
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/*
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* Definitions for GPIO pin assignments
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*/
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#if defined CONFIG_B_SAMPLE
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# define LED_PWR_BL_GPIO GPIO_TO_PIN(1, 17)
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# define LED_PWR_RD_GPIO GPIO_TO_PIN(1, 18)
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# define LED_PWR_GN_GPIO GPIO_TO_PIN(1, 19)
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# define LED_CONN_BL_GPIO GPIO_TO_PIN(0, 26)
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# define LED_CONN_RD_GPIO GPIO_TO_PIN(0, 22)
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# define LED_CONN_GN_GPIO GPIO_TO_PIN(0, 23)
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# define RESET_GPIO GPIO_TO_PIN(1, 29)
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# define WIFI_REGEN_GPIO GPIO_TO_PIN(1, 16)
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# define WIFI_RST_GPIO GPIO_TO_PIN(0, 27)
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# define ZIGBEE_RST_GPIO GPIO_TO_PIN(3, 18)
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# define BIDCOS_RST_GPIO GPIO_TO_PIN(0, 12)
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# define ENOC_RST_GPIO GPIO_TO_PIN(1, 22)
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#else
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# define LED_PWR_BL_GPIO GPIO_TO_PIN(0, 22)
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# define LED_PWR_RD_GPIO GPIO_TO_PIN(0, 23)
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# define LED_LAN_BL_GPIO GPIO_TO_PIN(1, 17)
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# define LED_LAN_RD_GPIO GPIO_TO_PIN(0, 26)
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# define LED_CLOUD_BL_GPIO GPIO_TO_PIN(1, 18)
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# define LED_CLOUD_RD_GPIO GPIO_TO_PIN(2, 2)
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# define LED_PWM_GPIO GPIO_TO_PIN(1, 19)
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# define RESET_GPIO GPIO_TO_PIN(1, 29)
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# define WIFI_REGEN_GPIO GPIO_TO_PIN(1, 16)
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# define WIFI_RST_GPIO GPIO_TO_PIN(0, 27)
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# define ZIGBEE_RST_GPIO GPIO_TO_PIN(3, 18)
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# define BIDCOS_RST_GPIO GPIO_TO_PIN(1, 24)
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# define Z_WAVE_RST_GPIO GPIO_TO_PIN(1, 21)
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# define ENOC_RST_GPIO GPIO_TO_PIN(1, 22)
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#endif
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#define BACK_BUTTON_GPIO GPIO_TO_PIN(1, 29)
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#define FRONT_BUTTON_GPIO GPIO_TO_PIN(1, 25)
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/* Reset is on GPIO pin 29 of GPIO bank 1 */
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#define RESET_MASK (0x1 << 29)
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#define HDR_MAGIC 0x43485342
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#define HDR_ETH_ALEN 6
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#define HDR_NAME_LEN 8
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#define HDR_REV_LEN 8
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#define HDR_SER_LEN 16
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#define HDR_ROOT_LEN 12
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#define HDR_FATC_LEN 12
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/*
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* SHC parameters held in On-Board I²C EEPROM device.
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*
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* Header Format
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*
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* Name Size Contents
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*-------------------------------------------------------------
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* Magic 4 0x42 0x53 0x48 0x43 [BSHC]
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*
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* Version 2 0x0100 for v1.0
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*
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* Lenght 2 The length of the complete structure, not only this header
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*
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* Eth-MAC 6 Ethernet MAC Address
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* SHC Pool: 7C:AC:B2:00:10:01 - TBD
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*
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* --- Further values follow, not important for Bootloader ---
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*/
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struct shc_eeprom {
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u32 magic;
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u16 version;
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u16 lenght;
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uint8_t mac_addr[HDR_ETH_ALEN];
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};
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void enable_uart0_pin_mux(void);
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void enable_shc_board_pin_mux(void);
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void enable_shc_board_pwm_pin_mux(void);
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#endif
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