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d0af234130
Tegra210's PCI controller is largely identical to Tegra124, and hence shares the same binding. However, it has a unique compatible value due to the existence of at least one new HW bug that would prevent any driver for a previous HW version from operating correctly. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
349 lines
9.2 KiB
Text
349 lines
9.2 KiB
Text
#include <dt-bindings/clock/tegra210-car.h>
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#include <dt-bindings/gpio/tegra-gpio.h>
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#include <dt-bindings/pinctrl/pinctrl-tegra.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "nvidia,tegra210";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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pcie-controller@0,01003000 {
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compatible = "nvidia,tegra210-pcie";
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device_type = "pci";
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reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
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0x0 0x01003800 0x0 0x00000800 /* AFI registers */
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0x0 0x02000000 0x0 0x10000000>; /* configuration space */
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reg-names = "pads", "afi", "cs";
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interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
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<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
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interrupt-names = "intr", "msi";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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bus-range = <0x00 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */
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0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */
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0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
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0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
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0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
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clocks = <&tegra_car TEGRA210_CLK_PCIE>,
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<&tegra_car TEGRA210_CLK_AFI>,
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<&tegra_car TEGRA210_CLK_PLL_E>,
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<&tegra_car TEGRA210_CLK_CML0>;
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clock-names = "pex", "afi", "pll_e", "cml";
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resets = <&tegra_car 70>,
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<&tegra_car 72>,
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<&tegra_car 74>;
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reset-names = "pex", "afi", "pcie_x";
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status = "disabled";
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phys = <&padctl TEGRA_XUSB_PADCTL_PCIE>;
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phy-names = "pcie";
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pci@1,0 {
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device_type = "pci";
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assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
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reg = <0x000800 0 0 0 0>;
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status = "disabled";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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nvidia,num-lanes = <4>;
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};
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pci@2,0 {
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device_type = "pci";
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assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
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reg = <0x001000 0 0 0 0>;
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status = "disabled";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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nvidia,num-lanes = <1>;
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};
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};
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gic: interrupt-controller@0,50041000 {
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compatible = "arm,gic-400";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x0 0x50041000 0x0 0x1000>,
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<0x0 0x50042000 0x0 0x2000>,
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<0x0 0x50044000 0x0 0x2000>,
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<0x0 0x50046000 0x0 0x2000>;
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interrupts = <GIC_PPI 9
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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interrupt-parent = <&gic>;
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};
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tegra_car: clock@0,60006000 {
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compatible = "nvidia,tegra210-car";
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reg = <0x0 0x60006000 0x0 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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gpio: gpio@0,6000d000 {
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compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio";
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reg = <0x0 0x6000d000 0x0 0x1000>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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i2c@0,7000c000 {
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compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
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reg = <0x0 0x7000c000 0x0 0x100>;
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interrupts = <0 38 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 12>;
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status = "disabled";
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};
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i2c@0,7000c400 {
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compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
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reg = <0x0 0x7000c400 0x0 0x100>;
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interrupts = <0 84 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 54>;
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status = "disabled";
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};
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i2c@0,7000c500 {
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compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
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reg = <0x0 0x7000c500 0x0 0x100>;
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interrupts = <0 92 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 67>;
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status = "disabled";
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};
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i2c@0,7000c700 {
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compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
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reg = <0x0 0x7000c700 0x0 0x100>;
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interrupts = <0 120 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 103>;
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status = "disabled";
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};
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i2c@0,7000d000 {
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compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
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reg = <0x0 0x7000d000 0x0 0x100>;
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interrupts = <0 53 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 47>;
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status = "disabled";
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};
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i2c@0,7000d100 {
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compatible = "nvidia,tegra210-i2c", "nvidia,tegra114-i2c";
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reg = <0x0 0x7000d100 0x0 0x100>;
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interrupts = <0 53 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 47>;
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status = "disabled";
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};
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uarta: serial@0,70006000 {
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compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
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reg = <0x0 0x70006000 0x0 0x40>;
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reg-shift = <2>;
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interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA210_CLK_UARTA>;
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resets = <&tegra_car 6>;
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reset-names = "serial";
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status = "disabled";
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};
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uartb: serial@0,70006040 {
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compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
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reg = <0x0 0x70006040 0x0 0x40>;
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reg-shift = <2>;
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA210_CLK_UARTB>;
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resets = <&tegra_car 7>;
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reset-names = "serial";
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status = "disabled";
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};
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uartc: serial@0,70006200 {
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compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
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reg = <0x0 0x70006200 0x0 0x40>;
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reg-shift = <2>;
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA210_CLK_UARTC>;
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resets = <&tegra_car 55>;
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reset-names = "serial";
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status = "disabled";
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};
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uartd: serial@0,70006300 {
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compatible = "nvidia,tegra210-uart", "nvidia,tegra20-uart";
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reg = <0x0 0x70006300 0x0 0x40>;
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reg-shift = <2>;
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interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA210_CLK_UARTD>;
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resets = <&tegra_car 65>;
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reset-names = "serial";
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status = "disabled";
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};
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spi@0,7000d400 {
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compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
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reg = <0x0 0x7000d400 0x0 0x200>;
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interrupts = <0 59 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA210_CLK_SBC1>;
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resets = <&tegra_car 41>;
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reset-names = "spi";
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status = "disabled";
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};
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spi@0,7000d600 {
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compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
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reg = <0x0 0x7000d600 0x0 0x200>;
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interrupts = <0 82 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA210_CLK_SBC2>;
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resets = <&tegra_car 44>;
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reset-names = "spi";
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status = "disabled";
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};
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spi@0,7000d800 {
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compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
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reg = <0x0 0x7000d800 0x0 0x200>;
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interrupts = <0 83 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA210_CLK_SBC3>;
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resets = <&tegra_car 46>;
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reset-names = "spi";
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status = "disabled";
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};
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spi@0,7000da00 {
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compatible = "nvidia,tegra210-spi", "nvidia,tegra114-spi";
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reg = <0x0 0x7000da00 0x0 0x200>;
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interrupts = <0 93 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA210_CLK_SBC4>;
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resets = <&tegra_car 68>;
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reset-names = "spi";
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status = "disabled";
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};
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spi@0,70410000 {
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compatible = "nvidia,tegra210-qspi";
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reg = <0x0 0x70410000 0x0 0x1000>;
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interrupts = <0 10 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 211>;
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status = "disabled";
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};
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padctl: padctl@0,7009f000 {
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compatible = "nvidia,tegra210-xusb-padctl";
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reg = <0x0 0x7009f000 0x0 0x1000>;
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resets = <&tegra_car 142>;
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reset-names = "padctl";
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#phy-cells = <1>;
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};
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sdhci@0,700b0000 {
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compatible = "nvidia,tegra210-sdhci";
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reg = <0x0 0x700b0000 0x0 0x200>;
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interrupts = <0 14 0x04>;
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clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
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resets = <&tegra_car 14>;
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reset-names = "sdhci";
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status = "disabled";
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};
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sdhci@0,700b0200 {
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compatible = "nvidia,tegra210-sdhci";
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reg = <0x0 0x700b0200 0x0 0x200>;
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interrupts = <0 15 0x04>;
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clocks = <&tegra_car TEGRA210_CLK_SDMMC2>;
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resets = <&tegra_car 9>;
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reset-names = "sdhci";
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status = "disabled";
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};
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sdhci@0,700b0400 {
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compatible = "nvidia,tegra210-sdhci";
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reg = <0x0 0x700b0400 0x0 0x200>;
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interrupts = <0 19 0x04>;
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clocks = <&tegra_car TEGRA210_CLK_SDMMC3>;
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resets = <&tegra_car 69>;
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reset-names = "sdhci";
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status = "disabled";
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};
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sdhci@0,700b0600 {
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compatible = "nvidia,tegra210-sdhci";
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reg = <0x0 0x700b0600 0x0 0x200>;
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interrupts = <0 31 0x04>;
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clocks = <&tegra_car TEGRA210_CLK_SDMMC4>;
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resets = <&tegra_car 15>;
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reset-names = "sdhci";
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status = "disabled";
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};
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usb@0,7d000000 {
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compatible = "nvidia,tegra210-ehci";
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reg = <0x0 0x7d000000 0x0 0x4000>;
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interrupts = <0 20 0x04>;
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phy_type = "utmi";
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clocks = <&tegra_car TEGRA210_CLK_USBD>;
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resets = <&tegra_car 22>;
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reset-names = "usb";
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status = "disabled";
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};
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usb@0,7d004000 {
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compatible = "nvidia,tegra210-ehci";
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reg = <0x0 0x7d004000 0x0 0x4000>;
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interrupts = < 53 >;
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phy_type = "utmi";
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clocks = <&tegra_car TEGRA210_CLK_USB2>;
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resets = <&tegra_car 58>;
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reset-names = "usb";
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status = "disabled";
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};
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};
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