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7a888de4b5
Add USB3 PHY driver support to control clocks and resets needed to enable PHY. The phy_ops->init() and exit() control PHY clocks and resets only, and clocks and resets for the controller and the parent logic are enabled in advance. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de>
20 lines
471 B
Text
20 lines
471 B
Text
# SPDX-License-Identifier: GPL-2.0-only
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#
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# PHY drivers for Socionext platforms.
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#
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config PHY_UNIPHIER_PCIE
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bool "UniPhier PCIe PHY driver"
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depends on PHY && ARCH_UNIPHIER
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imply REGMAP
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help
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Enable this to support PHY implemented in PCIe controller
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on UniPhier SoCs.
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config PHY_UNIPHIER_USB3
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bool "UniPhier USB3 PHY driver"
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depends on PHY && ARCH_UNIPHIER
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imply REGMAP
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help
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Enable this to support PHY implemented in USB3 controller
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on UniPhier SoCs.
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