mirror of
https://github.com/AsahiLinux/u-boot
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b2356be87d
The ethernet controller is DM compliant, and the device tree defines it. There is no need to manually handle pulling the ethernet out of reset. Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
153 lines
3.3 KiB
C
153 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* am3517evm.c - board file for TI's AM3517 family of devices.
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*
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* Author: Vaibhav Hiremath <hvaibhav@ti.com>
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*
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* Based on ti/evm/evm.c
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*
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* Copyright (C) 2010
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* Texas Instruments Incorporated - http://www.ti.com/
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*/
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#include <common.h>
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#include <dm.h>
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#include <init.h>
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#include <net.h>
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#include <ns16550.h>
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#include <serial.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/omap_musb.h>
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#include <asm/arch/am35x_def.h>
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#include <asm/arch/mem.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/musb.h>
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#include <asm/mach-types.h>
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#include <linux/errno.h>
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#include <asm/gpio.h>
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#include <linux/usb/ch9.h>
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#include <linux/usb/gadget.h>
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#include <linux/usb/musb.h>
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#include <i2c.h>
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#include "am3517evm.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define AM3517_IP_SW_RESET 0x48002598
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#define CPGMACSS_SW_RST (1 << 1)
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#define PHY_GPIO 30
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#if defined(CONFIG_SPL_BUILD)
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#if defined(CONFIG_SPL_OS_BOOT)
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int spl_start_uboot(void)
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{
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/* break into full u-boot on 'c' */
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return serial_tstc() && serial_getc() == 'c';
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}
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#endif
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#endif
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/*
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* Routine: board_init
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* Description: Early hardware init.
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*/
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int board_init(void)
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{
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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/* board id for Linux */
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gd->bd->bi_arch_number = MACH_TYPE_OMAP3517EVM;
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/* boot param addr */
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gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
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return 0;
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}
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#ifdef CONFIG_USB_MUSB_AM35X
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static struct musb_hdrc_config musb_config = {
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.multipoint = 1,
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.dyn_fifo = 1,
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.num_eps = 16,
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.ram_bits = 12,
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};
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static struct omap_musb_board_data musb_board_data = {
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.set_phy_power = am35x_musb_phy_power,
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.clear_irq = am35x_musb_clear_irq,
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.reset = am35x_musb_reset,
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};
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static struct musb_hdrc_platform_data musb_plat = {
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#if defined(CONFIG_USB_MUSB_HOST)
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.mode = MUSB_HOST,
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#elif defined(CONFIG_USB_MUSB_GADGET)
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.mode = MUSB_PERIPHERAL,
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#else
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#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
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#endif
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.config = &musb_config,
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.power = 250,
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.platform_ops = &am35x_ops,
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.board_data = &musb_board_data,
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};
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static void am3517_evm_musb_init(void)
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{
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/*
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* Set up USB clock/mode in the DEVCONF2 register.
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* USB2.0 PHY reference clock is 13 MHz
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*/
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clrsetbits_le32(&am35x_scm_general_regs->devconf2,
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CONF2_REFFREQ | CONF2_OTGMODE | CONF2_PHY_GPIOMODE,
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CONF2_REFFREQ_13MHZ | CONF2_SESENDEN |
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CONF2_VBDTCTEN | CONF2_DATPOL);
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musb_register(&musb_plat, &musb_board_data,
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(void *)AM35XX_IPSS_USBOTGSS_BASE);
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}
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#else
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#define am3517_evm_musb_init() do {} while (0)
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#endif
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/*
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* Routine: misc_init_r
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* Description: Init i2c, ethernet, etc... (done here so udelay works)
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*/
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int misc_init_r(void)
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{
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omap_die_id_display();
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am3517_evm_musb_init();
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return 0;
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}
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/*
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* Routine: set_muxconf_regs
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* Description: Setting up the configuration Mux registers specific to the
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* hardware. Many pins need to be moved from protect to primary
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* mode.
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*/
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void set_muxconf_regs(void)
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{
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MUX_AM3517EVM();
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}
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#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
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int board_eth_init(struct bd_info *bis)
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{
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int rv, n = 0;
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rv = cpu_eth_init(bis);
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if (rv > 0)
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n += rv;
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rv = usb_eth_initialize(bis);
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if (rv > 0)
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n += rv;
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return n;
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}
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#endif
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