mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-16 01:38:22 +00:00
8bde7f776c
- remove trailing white space, trailing empty lines, C++ comments, etc.
- split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)
* Patches by Kenneth Johansson, 25 Jun 2003:
- major rework of command structure
(work done mostly by Michal Cendrowski and Joakim Kristiansen)
196 lines
4.7 KiB
ArmAsm
196 lines
4.7 KiB
ArmAsm
/**************************************
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*
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* copyright @ Motorola, 1999
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*
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**************************************/
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#include <ppc_asm.tmpl>
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#include <ppc_defs.h>
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#include <asm/processor.h>
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/*********************************************
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* function: CoreExtIntEnable
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*
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* description: Enable 603e core external interrupt
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*
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* note: mtmsr is context-synchronization
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**********************************************/
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.text
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.align 2
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.global CoreExtIntEnable
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CoreExtIntEnable:
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mfmsr r3
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ori r3,r3,0x8000 /* enable external interrupt */
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mtmsr r3
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bclr 20, 0
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/*******************************************
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* function: CoreExtIntDisable
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*
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* description: Disable 603e core external interrupt
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*
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* note:
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*******************************************/
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.text
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.align 2
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.global CoreExtIntDisable
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CoreExtIntDisable:
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mfmsr r4
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xor r3,r3,r3
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or r3,r3,r4
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andis. r4,r4,0xffff
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andi. r3,r3,0x7fff /* disable external interrupt */
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or r3,r3,r4
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mtmsr r3
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bclr 20, 0
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/*********************************************************
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* function: epicEOI
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*
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* description: signal the EOI and restore machine status
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* Input: r3 - value of eumbbar
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* Output: r3 - value of eumbbar
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* r4 - ISR vector value
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* note:
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********************************************************/
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.text
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.align 2
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.global epicEOI
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epicEOI:
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lis r5,0x0006 /* Build End Of Interrupt Register offset */
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ori r5,r5,0x00b0
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xor r7,r7,r7 /* Clear r7 */
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stwbrx r7,r5,r3 /* Save r7, writing to this register will
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* intidate the end of processing the
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* highest interrupt.
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*/
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sync
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/* ---RESTORE MACHINE STATE */
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mfmsr r13 /* Clear Recoverable Interrupt bit in MSR */
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or r7,r7,r13
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andis. r7,r7,0xffff
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andi. r13,r13,0x7ffd /* (and disable interrupts) */
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or r13,r13,r7
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mtmsr r13
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lwz r13,0x1c(r1) /* pull ctr */
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mtctr r13
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lwz r13,0x18(r1) /* pull xer */
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mtctr r13
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lwz r13,0x14(r1) /* pull lr */
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mtctr r13
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lwz r13,0x10(r1) /* Pull SRR1 from stack */
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mtspr SRR1,r13 /* Restore SRR1 */
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lwz r13,0xc(r1) /* Pull SRR0 from stack */
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mtspr SRR0,r13 /* Restore SRR0 */
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lwz r13,0x8(r1) /* Pull User stack pointer from stack */
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mtspr SPRG1,r13 /* Restore SPRG1 */
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lwz r4,0x4(r1) /* vector value */
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lwz r3,0x0(r1) /* eumbbar */
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sync
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addi r1,r1,0x20 /* Deallocate stack */
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mtspr SPRG0,r1 /* Save updated Supervisor stack pointer */
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mfspr r1,SPRG1 /* Restore User stack pointer */
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bclr 20,0
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/***********************************************************
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* function: exception routine called by exception vector
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* at 0x500, external interrupt
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*
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* description: Kahlua EPIC controller
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*
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* input: r3 - content of eumbbar
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* output: r3 - ISR return value
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* r4 - Interrupt vector number
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* note:
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***********************************************************/
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.text
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.align 2
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.global epic_exception
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epic_exception:
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/*---SAVE MACHINE STATE TO A STACK */
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mtspr SPRG1,r1 /* Save User stack pointer to SPRG1 */
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mfspr r1,SPRG0 /* Load Supervisor stack pointer into r1 */
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stwu r3,-0x20(r1) /* Push the value of eumbbar onto stack */
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mfspr r3,SPRG1 /* Push User stack pointer onto stack */
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stw r3,0x8(r1)
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mfspr r3,SRR0 /* Push SRR0 onto stack */
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stw r1,0xc(r1)
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mfspr r3,SRR1 /* Push SRR1 onto stack */
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stw r3,0x10(r1)
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mflr r3
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stw r3,0x14(r1) /* Push LR */
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mfxer r3
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stw r3,0x18(r1) /* Push Xer */
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mfctr r3
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stw r3,0x1c(r1) /* Push CTR */
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mtspr SPRG0,r1 /* Save updated Supervisor stack pointer
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* value to SPRG0
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*/
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mfmsr r3
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ori r3,r3,0x0002 /* Set Recoverable Interrupt bit in MSR */
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mtmsr r3
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/* ---READ IN THE EUMBAR REGISTER */
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lwz r6,0(r1) /* this is eumbbar */
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sync
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/* ---READ EPIC REGISTER: PROCESSOR INTERRUPT ACKNOWLEDGE REGISTER */
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lis r5,0x0006 /* Build Interrupt Acknowledge Register
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* offset
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*/
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ori r5,r5,0x00a0
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lwbrx r7,r5,r6 /* Load interrupt vector into r7 */
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sync
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/* --MASK OFF ALL BITS EXCEPT THE VECTOR */
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xor r3,r3,r3
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xor r4,r4,r4
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or r3, r3, r6 /* eumbbar in r3 */
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andi. r4,r7,0x00ff /* Mask off bits, vector in r4 */
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stw r4,0x04(r1) /* save the vector value */
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lis r5,epicISR@ha
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ori r5,r5,epicISR@l
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mtlr r5
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blrl
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xor r30,r30,r30
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or r30,r30,r3 /* save the r3 which containts the return value from epicISR */
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/* ---READ IN THE EUMBAR REGISTER */
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lwz r3,0(r1)
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sync
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lis r5,epicEOI@ha
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ori r5,r5,epicEOI@l
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mtlr r5
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blrl
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xor r3,r3,r3
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or r3,r3,r30 /* restore the ISR return value */
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bclr 20,0
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