mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 08:57:58 +00:00
c71645ad2b
This patch add gicv3 support to uboot armv8 platform.
Changes for v2:
- rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S
- move smp_kick_all_cpus() from gic.S to start.S, it would be
implementation dependent.
- Each core initialize it's own ReDistributor instead of master
initializeing all ReDistributors. This is advised by arnab.basu
<arnab.basu@freescale.com>.
Signed-off-by: David Feng <fenghua@phytium.com.cn>
196 lines
5.6 KiB
C
196 lines
5.6 KiB
C
/*
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* Configuration for Versatile Express. Parts were derived from other ARM
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* configurations.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __VEXPRESS_AEMV8A_H
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#define __VEXPRESS_AEMV8A_H
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#define DEBUG
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#define CONFIG_REMAKE_ELF
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#define CONFIG_GICV3
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/*#define CONFIG_ARMV8_SWITCH_TO_EL1*/
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/*#define CONFIG_SYS_GENERIC_BOARD*/
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SUPPORT_RAW_INITRD
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/* Cache Definitions */
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#define CONFIG_SYS_DCACHE_OFF
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#define CONFIG_SYS_ICACHE_OFF
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#define CONFIG_IDENT_STRING " vexpress_aemv8a"
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#define CONFIG_BOOTP_VCI_STRING "U-boot.armv8.vexpress_aemv8a"
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/* Link Definitions */
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#define CONFIG_SYS_TEXT_BASE 0x80000000
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
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/* Flat Device Tree Definitions */
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#define CONFIG_OF_LIBFDT
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#define CONFIG_DEFAULT_DEVICE_TREE vexpress64
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/* SMP Spin Table Definitions */
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#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
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/* CS register bases for the original memory map. */
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#define V2M_PA_CS0 0x00000000
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#define V2M_PA_CS1 0x14000000
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#define V2M_PA_CS2 0x18000000
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#define V2M_PA_CS3 0x1c000000
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#define V2M_PA_CS4 0x0c000000
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#define V2M_PA_CS5 0x10000000
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#define V2M_PERIPH_OFFSET(x) (x << 16)
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#define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
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#define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
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#define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
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#define V2M_BASE 0x80000000
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/*
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* Physical addresses, offset from V2M_PA_CS0-3
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*/
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#define V2M_NOR0 (V2M_PA_CS0)
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#define V2M_NOR1 (V2M_PA_CS4)
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#define V2M_SRAM (V2M_PA_CS1)
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/* Common peripherals relative to CS7. */
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#define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
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#define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
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#define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
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#define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
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#define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
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#define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
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#define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
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#define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
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#define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
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#define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
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#define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
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#define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
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#define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
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#define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
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#define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
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/* System register offsets. */
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#define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
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#define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
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#define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
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/* Generic Timer Definitions */
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#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
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/* Generic Interrupt Controller Definitions */
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#ifdef CONFIG_GICV3
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#define GICD_BASE (0x2f000000)
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#define GICR_BASE (0x2f100000)
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#else
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#define GICD_BASE (0x2C001000)
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#define GICC_BASE (0x2C002000)
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#endif
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#define CONFIG_SYS_MEMTEST_START V2M_BASE
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#define CONFIG_SYS_MEMTEST_END (V2M_BASE + 0x80000000)
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
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/* SMSC91C111 Ethernet Configuration */
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#define CONFIG_SMC91111 1
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#define CONFIG_SMC91111_BASE (0x01A000000)
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/* PL011 Serial Configuration */
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#define CONFIG_PL011_SERIAL
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#define CONFIG_PL011_CLOCK 24000000
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#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
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(void *)CONFIG_SYS_SERIAL1}
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#define CONFIG_CONS_INDEX 0
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_SYS_SERIAL0 V2M_UART0
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#define CONFIG_SYS_SERIAL1 V2M_UART1
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/* Command line configuration */
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#define CONFIG_MENU
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/*#define CONFIG_MENU_SHOW*/
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_BDI
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_PXE
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#define CONFIG_CMD_ENV
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#define CONFIG_CMD_FLASH
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#define CONFIG_CMD_IMI
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#define CONFIG_CMD_MEMORY
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_SAVEENV
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#define CONFIG_CMD_RUN
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#define CONFIG_CMD_BOOTD
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#define CONFIG_CMD_ECHO
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#define CONFIG_CMD_SOURCE
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#define CONFIG_CMD_FAT
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#define CONFIG_DOS_PARTITION
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/* BOOTP options */
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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#define CONFIG_BOOTP_PXE
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#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2048 MB */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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/* Initial environment variables */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"kernel_addr=0x200000\0" \
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"initrd_addr=0xa00000\0" \
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"initrd_size=0x2000000\0" \
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"fdt_addr=0x100000\0" \
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"fdt_high=0xa0000000\0"
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#define CONFIG_BOOTARGS "console=ttyAMA0 root=/dev/ram0"
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#define CONFIG_BOOTCOMMAND "bootm $kernel_addr " \
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"$initrd_addr:$initrd_size $fdt_addr"
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#define CONFIG_BOOTDELAY -1
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/* Do not preserve environment */
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#define CONFIG_ENV_IS_NOWHERE 1
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#define CONFIG_ENV_SIZE 0x1000
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PROMPT "VExpress64# "
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING 1
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#define CONFIG_SYS_MAXARGS 64 /* max command args */
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#endif /* __VEXPRESS_AEMV8A_H */
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