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u-boot/board/amlogic/libretech-cc
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Neil Armstrong c7be3e5a79 ARM: arch-meson: build memory banks using reported memory from registers 
As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware
and a secondary BL32 firmware.
Since mid-2017, the reserved memory address of the BL31 firmware was moved
and grown for security reasons.

But mainline U-Boot and Linux has the old address and size fixed.

These SoCs have a register interface to get the two firmware reserved
memory start and sizes.

This patch adds a dynamic reservation of the memory zones in the device tree bootmem
reserved memory zone used by the kernel in early boot.
To be complete, the memory zones are also added to the EFI reserved zones.

Depends on patchset "Add support for Amlogic GXL Based SBCs" at [2].

[1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html
[2] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005410.html

Changes since v1:
- switched the #if to if(IS_ENABLED()) to compile all code paths
- renamed function to meson_board_add_reserved_memory()
- added a mem.h header with comment
- updated all boards ft_board_setup()

Changes since RFC v2:
- reduced preprocessor load
- kept Odroid-C2 static memory mapping as exception

Changes since RFC v1:
- switch to fdt rsv mem table and efi reserve memory
- replaced in_le32 by readl()

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[trini: Fix warning on khadas-vim over missing <asm/arch/mem.h>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-12-04 10:17:29 -05:00
..
Kconfig arm: Add LibreTech CC support based on Meson GXL family 2017-12-04 09:59:03 -05:00
libretech-cc.c ARM: arch-meson: build memory banks using reported memory from registers 2017-12-04 10:17:29 -05:00
MAINTAINERS arm: Add LibreTech CC support based on Meson GXL family 2017-12-04 09:59:03 -05:00
Makefile arm: Add LibreTech CC support based on Meson GXL family 2017-12-04 09:59:03 -05:00
README arm: Add LibreTech CC support based on Meson GXL family 2017-12-04 09:59:03 -05:00

README 

U-Boot for LibreTech CC
=======================

LibreTech CC is a single board computer manufactured by Libre Technology
with the following specifications:

 - Amlogic S905X ARM Cortex-A53 quad-core SoC @ 2GHz
 - ARM Mali 450 GPU
 - 2GB DDR3 SDRAM
 - Gigabit Ethernet
 - HDMI 2.0 4K/60Hz display
 - 40-pin GPIO header
 - 4 x USB 2.0 Host, 1 x USB OTG
 - eMMC, microSD
 - Infrared receiver

Schematics are available on the manufacturer website.

Currently the U-Boot port supports the following devices:
 - serial
 - eMMC, microSD
 - Ethernet

U-Boot compilation
==================

 > export ARCH=arm
 > export CROSS_COMPILE=aarch64-none-elf-
 > make libretech-cc_defconfig
 > make

Image creation
==============

Amlogic doesn't provide sources for the firmware and for tools needed
to create the bootloader image, so it is necessary to obtain them from
the git tree published by the board vendor:

 > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
 > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
 > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
 > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
 > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
 > git clone https://github.com/BayLibre/u-boot.git -b libretech-cc amlogic-u-boot
 > cd amlogic-u-boot
 > make libretech_cc_defconfig
 > make
 > export FIPDIR=$PWD/fip

Go back to mainline U-Boot source tree then :
 > mkdir fip

 > cp $FIPDIR/gxl/bl2.bin fip/
 > cp $FIPDIR/gxl/acs.bin fip/
 > cp $FIPDIR/gxl/bl21.bin fip/
 > cp $FIPDIR/gxl/bl30.bin fip/
 > cp $FIPDIR/gxl/bl301.bin fip/
 > cp $FIPDIR/gxl/bl31.img fip/
 > cp u-boot.bin fip/bl33.bin

 > $FIPDIR/blx_fix.sh \
	fip/bl30.bin \
	fip/zero_tmp \
	fip/bl30_zero.bin \
	fip/bl301.bin \
	fip/bl301_zero.bin \
	fip/bl30_new.bin \
	bl30

 > $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0

 > $FIPDIR/blx_fix.sh \
	fip/bl2_acs.bin \
	fip/zero_tmp \
	fip/bl2_zero.bin \
	fip/bl21.bin \
	fip/bl21_zero.bin \
	fip/bl2_new.bin \
	bl2

 > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
 > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
 > $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
 > $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
 > $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
		--output fip/u-boot.bin \
		--bl2 fip/bl2.n.bin.sig \
		--bl30 fip/bl30_new.bin.enc \
		--bl31 fip/bl31.img.enc \
		--bl33 fip/bl33.bin.enc

and then write the image to SD with:

 > DEV=/dev/your_sd_device
 > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
 > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444