u-boot/board/AndesTech/ax25-ae350/ax25-ae350.c
Rick Chen e8fa43182a riscv: ae350: Use fdtdec_get_addr_size_auto_noparent to parse smc reg
Use fdtdec_get_addr_size_auto_noparent to read the "reg" property
instead of fdtdec_get_addr. This will increase the compatibility
of dtb parsing.

Signed-off-by: Rick Chen <rick@andestech.com>
Acked-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Leo Liang <ycliang@andestech.com>
2020-07-24 14:56:24 +08:00

127 lines
2.2 KiB
C

// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Andes Technology Corporation
* Rick Chen, Andes Technology Corporation <rick@andestech.com>
*/
#include <common.h>
#include <flash.h>
#include <image.h>
#include <init.h>
#include <net.h>
#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
#include <netdev.h>
#endif
#include <linux/io.h>
#include <faraday/ftsmc020.h>
#include <fdtdec.h>
#include <dm.h>
#include <spl.h>
DECLARE_GLOBAL_DATA_PTR;
extern phys_addr_t prior_stage_fdt_address;
/*
* Miscellaneous platform dependent initializations
*/
int board_init(void)
{
gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
return 0;
}
int dram_init(void)
{
return fdtdec_setup_mem_size_base();
}
int dram_init_banksize(void)
{
return fdtdec_setup_memory_banksize();
}
#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
int board_eth_init(struct bd_info *bd)
{
return ftmac100_initialize(bd);
}
#endif
ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
{
return 0;
}
void *board_fdt_blob_setup(void)
{
return (void *)CONFIG_SYS_FDT_BASE;
}
int smc_init(void)
{
int node = -1;
const char *compat = "andestech,atfsmc020";
void *blob = (void *)gd->fdt_blob;
fdt_addr_t addr;
struct ftsmc020_bank *regs;
node = fdt_node_offset_by_compatible(blob, -1, compat);
if (node < 0)
return -FDT_ERR_NOTFOUND;
addr = fdtdec_get_addr_size_auto_noparent(blob, node,
"reg", 0, NULL, false);
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
regs = (struct ftsmc020_bank *)addr;
regs->cr &= ~FTSMC020_BANK_WPROT;
return 0;
}
static void v5l2_init(void)
{
struct udevice *dev;
uclass_get_device(UCLASS_CACHE, 0, &dev);
}
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
smc_init();
v5l2_init();
return 0;
}
#endif
#ifdef CONFIG_SPL
void board_boot_order(u32 *spl_boot_list)
{
u8 i;
u32 boot_devices[] = {
#ifdef CONFIG_SPL_RAM_SUPPORT
BOOT_DEVICE_RAM,
#endif
#ifdef CONFIG_SPL_MMC_SUPPORT
BOOT_DEVICE_MMC1,
#endif
};
for (i = 0; i < ARRAY_SIZE(boot_devices); i++)
spl_boot_list[i] = boot_devices[i];
}
#endif
#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{
/* boot using first FIT config */
return 0;
}
#endif