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https://github.com/AsahiLinux/u-boot
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a47a12becf
As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
123 lines
3.1 KiB
C
123 lines
3.1 KiB
C
/*
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* (C) Copyright 2004, Freescale, Inc
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* TsiChung Liew, Tsi-Chung.Liew@freescale.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc8220.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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typedef struct pllmultiplier {
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u8 hid1;
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int multi;
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int vco_div;
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} pllcfg_t;
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/* ------------------------------------------------------------------------- */
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/*
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*
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*/
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int get_clocks (void)
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{
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pllcfg_t bus2core[] = {
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{0x02, 2, 8}, /* 1 */
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{0x01, 2, 4},
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{0x0C, 3, 8}, /* 1.5 */
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{0x00, 3, 4},
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{0x18, 3, 2},
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{0x05, 4, 4}, /* 2 */
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{0x04, 4, 2},
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{0x11, 5, 4}, /* 2.5 */
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{0x06, 5, 2},
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{0x10, 6, 4}, /* 3 */
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{0x08, 6, 2},
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{0x0E, 7, 2}, /* 3.5 */
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{0x0A, 8, 2}, /* 4 */
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{0x07, 9, 2}, /* 4.5 */
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{0x0B, 10, 2}, /* 5 */
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{0x09, 11, 2}, /* 5.5 */
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{0x0D, 12, 2}, /* 6 */
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{0x12, 13, 2}, /* 6.5 */
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{0x14, 14, 2}, /* 7 */
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{0x16, 15, 2}, /* 7.5 */
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{0x1C, 16, 2} /* 8 */
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};
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u32 hid1;
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int i, size, pci2bus;
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#if !defined(CONFIG_SYS_MPC8220_CLKIN)
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#error clock measuring not implemented yet - define CONFIG_SYS_MPC8220_CLKIN
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#endif
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gd->inp_clk = CONFIG_SYS_MPC8220_CLKIN;
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/* Read XLB to PCI(INP) clock multiplier */
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pci2bus = (*((volatile u32 *)PCI_REG_PCIGSCR) &
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PCI_REG_PCIGSCR_PCI2XLB_CLK_MASK)>>PCI_REG_PCIGSCR_PCI2XLB_CLK_BIT;
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/* XLB bus clock */
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gd->bus_clk = CONFIG_SYS_MPC8220_CLKIN * pci2bus;
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/* PCI clock is same as input clock */
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gd->pci_clk = CONFIG_SYS_MPC8220_CLKIN;
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/* FlexBus is temporary set as the same as input clock */
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/* will do dynamic in the future */
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gd->flb_clk = CONFIG_SYS_MPC8220_CLKIN;
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/* CPU Clock - Read HID1 */
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asm volatile ("mfspr %0, 1009":"=r" (hid1):);
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size = sizeof (bus2core) / sizeof (pllcfg_t);
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hid1 >>= 27;
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for (i = 0; i < size; i++)
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if (hid1 == bus2core[i].hid1) {
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gd->cpu_clk = (bus2core[i].multi * gd->bus_clk) >> 1;
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gd->vco_clk = CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER * (gd->pci_clk * bus2core[i].vco_div)/2;
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break;
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}
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/* hardcoded 81MHz for now */
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gd->pev_clk = 81000000;
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return (0);
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}
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int prt_mpc8220_clks (void)
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{
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char buf1[32], buf2[32], buf3[32], buf4[32];
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printf (" Bus %s MHz, CPU %s MHz, PCI %s MHz, VCO %s MHz\n",
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strmhz(buf1, gd->bus_clk),
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strmhz(buf2, gd->cpu_clk),
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strmhz(buf3, gd->pci_clk),
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strmhz(buf4, gd->vco_clk)
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);
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return (0);
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}
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/* ------------------------------------------------------------------------- */
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