mirror of
https://github.com/AsahiLinux/u-boot
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8bf69d8178
Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136 to cpu/arm1136/omap24xx. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
82 lines
2.8 KiB
C
82 lines
2.8 KiB
C
/*
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* (C) Copyright 2004
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* Texas Instruments, <www.ti.com>
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* Richard Woodruff <r-woodruff2@ti.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _OMAP24XX_SYS_INFO_H_
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#define _OMAP24XX_SYS_INFO_H_
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typedef struct h4_system_data {
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/* base board info */
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u32 base_b_rev; /* rev from base board i2c */
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/* cpu board info */
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u32 cpu_b_rev; /* rev from cpu board i2c */
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u32 cpu_b_mux; /* mux type on daughter board */
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u32 cpu_b_ddr_type; /* mem type */
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u32 cpu_b_ddr_speed; /* ddr speed rating */
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u32 cpu_b_switches; /* boot ctrl switch settings */
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/* cpu info */
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u32 cpu_type; /* type of cpu; 2420, 2422, 2430,...*/
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u32 cpu_rev; /* rev of given cpu; ES1, ES2,...*/
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} h4_sys_data;
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#define XDR_POP 5 /* package on package part */
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#define SDR_DISCRETE 4 /* 128M memory SDR module*/
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#define DDR_STACKED 3 /* stacked part on 2422 */
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#define DDR_COMBO 2 /* combo part on cpu daughter card (menalaeus) */
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#define DDR_DISCRETE 1 /* 2x16 parts on daughter card */
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#define DDR_100 100 /* type found on most mem d-boards */
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#define DDR_111 111 /* some combo parts */
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#define DDR_133 133 /* most combo, some mem d-boards */
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#define DDR_165 165 /* future parts */
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#define CPU_2420 0x2420
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#define CPU_2422 0x2422 /* 2420 + 64M stacked */
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#define CPU_2423 0x2423 /* 2420 + 96M stacked */
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#define CPU_2422_ES1 1
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#define CPU_2422_ES2 2
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#define CPU_2420_ES1 1
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#define CPU_2420_ES2 2
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#define CPU_2420_2422_ES1 1
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#define CPU_2420_CHIPID 0x0B5D9000
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#define CPU_24XX_ID_MASK 0x0FFFF000
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#define CPU_242X_REV_MASK 0xF0000000
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#define CPU_242X_PID_MASK 0x000F0000
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#define BOARD_H4_MENELAUS 1
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#define BOARD_H4_SDP 2
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#define GPMC_MUXED 1
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#define GPMC_NONMUXED 0
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#define TYPE_NAND 0x800 /* bit pos for nand in gpmc reg */
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#define TYPE_NOR 0x000
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#define WIDTH_8BIT 0x0000
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#define WIDTH_16BIT 0x1000 /* bit pos for 16 bit in gpmc */
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#define I2C_MENELAUS 0x72 /* i2c id for companion chip */
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#endif
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