mirror of
https://github.com/AsahiLinux/u-boot
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7f51fe5c6d
Add the Xilinx Bootgen as bintool. Xilinx Bootgen is used to create bootable SPL (FSBL in Xilinx terms) images for Zynq/ZynqMP devices. The btool creates a signed version of the SPL. Additionally to signing the key source for the decryption engine can be passend to the boot image. Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com> |
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.. | ||
_testing.py | ||
bootgen.py | ||
btool_gzip.py | ||
bzip2.py | ||
cbfstool.py | ||
fdt_add_pubkey.py | ||
fiptool.py | ||
futility.py | ||
ifwitool.py | ||
lz4.py | ||
lzma_alone.py | ||
lzop.py | ||
mkimage.py | ||
openssl.py | ||
xz.py | ||
zstd.py |