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https://github.com/AsahiLinux/u-boot
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dac3c6f625
This adds a new board from CS GROUP. The board is called MCR3000_2G, and has a CPU board called CMPC885. That CPU board is shared with another equipment that will be added in a later patch. That board stores Ethernet MAC addresses in an EEPROM which is accessed using SPI bus. This patch was originally written by Charles Frey who's email address is not valid anymore as he left the company. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
47 lines
1.1 KiB
C
47 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2010-2020 CS Group
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* Florent Trinh Thai <florent.trinh-thai@c-s.fr>
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* Christophe Leroy <christophe.leroy@c-s.fr>
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* Charles Frey <charles.frey@c-s.fr>
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*/
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#include <config.h>
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#include <common.h>
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#include <nand.h>
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#include <linux/bitops.h>
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#include <linux/mtd/rawnand.h>
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#include <asm/io.h>
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#define BIT_CLE BIT(3)
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#define BIT_ALE BIT(2)
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#define BIT_NCE BIT(0)
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static u32 nand_mask(unsigned int ctrl)
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{
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return ((ctrl & NAND_CLE) ? BIT_CLE : 0) |
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((ctrl & NAND_ALE) ? BIT_ALE : 0) |
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(!(ctrl & NAND_NCE) ? BIT_NCE : 0);
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}
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static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
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{
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immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
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struct nand_chip *chip = mtd_to_nand(mtdinfo);
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if (ctrl & NAND_CTRL_CHANGE)
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clrsetbits_be16(&immr->im_ioport.iop_pddat,
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BIT_CLE | BIT_ALE | BIT_NCE, nand_mask(ctrl));
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if (cmd != NAND_CMD_NONE)
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out_8(chip->IO_ADDR_W, cmd);
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}
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int board_nand_init(struct nand_chip *chip)
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{
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chip->chip_delay = 60;
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chip->ecc.mode = NAND_ECC_SOFT;
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chip->cmd_ctrl = nand_hwcontrol;
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return 0;
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}
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