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228 lines
6.7 KiB
C
228 lines
6.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2010 Freescale Semiconductor, Inc.
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* Copyright 2020 NXP
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*
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* Author: Priyanka Jain <Priyanka.Jain@freescale.com>
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*/
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/*
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* This file provides Date & Time support (no alarms) for PT7C4338 chip.
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*
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* This file is based on drivers/rtc/ds1337.c
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*
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* PT7C4338 chip is manufactured by Pericom Technology Inc.
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* It is a serial real-time clock which provides
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* 1)Low-power clock/calendar.
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* 2)Programmable square-wave output.
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* It has 56 bytes of nonvolatile RAM.
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*/
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#include <common.h>
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#include <command.h>
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#include <dm.h>
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#include <log.h>
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#include <rtc.h>
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#include <i2c.h>
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/* RTC register addresses */
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#define RTC_SEC_REG_ADDR 0x0
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#define RTC_MIN_REG_ADDR 0x1
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#define RTC_HR_REG_ADDR 0x2
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#define RTC_DAY_REG_ADDR 0x3
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#define RTC_DATE_REG_ADDR 0x4
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#define RTC_MON_REG_ADDR 0x5
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#define RTC_YR_REG_ADDR 0x6
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#define RTC_CTL_STAT_REG_ADDR 0x7
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/* RTC second register address bit */
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#define RTC_SEC_BIT_CH 0x80 /* Clock Halt (in Register 0) */
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/* RTC control and status register bits */
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#define RTC_CTL_STAT_BIT_RS0 0x1 /* Rate select 0 */
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#define RTC_CTL_STAT_BIT_RS1 0x2 /* Rate select 1 */
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#define RTC_CTL_STAT_BIT_SQWE 0x10 /* Square Wave Enable */
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#define RTC_CTL_STAT_BIT_OSF 0x20 /* Oscillator Stop Flag */
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#define RTC_CTL_STAT_BIT_OUT 0x80 /* Output Level Control */
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/* RTC reset value */
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#define RTC_PT7C4338_RESET_VAL \
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(RTC_CTL_STAT_BIT_RS0 | RTC_CTL_STAT_BIT_RS1 | RTC_CTL_STAT_BIT_OUT)
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#if !CONFIG_IS_ENABLED(DM_RTC)
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/****** Helper functions ****************************************/
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static u8 rtc_read(u8 reg)
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{
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return i2c_reg_read(CONFIG_SYS_I2C_RTC_ADDR, reg);
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}
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static void rtc_write(u8 reg, u8 val)
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{
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i2c_reg_write(CONFIG_SYS_I2C_RTC_ADDR, reg, val);
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}
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/****************************************************************/
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/* Get the current time from the RTC */
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int rtc_get(struct rtc_time *tmp)
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{
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int ret = 0;
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u8 sec, min, hour, mday, wday, mon, year, ctl_stat;
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ctl_stat = rtc_read(RTC_CTL_STAT_REG_ADDR);
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sec = rtc_read(RTC_SEC_REG_ADDR);
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min = rtc_read(RTC_MIN_REG_ADDR);
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hour = rtc_read(RTC_HR_REG_ADDR);
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wday = rtc_read(RTC_DAY_REG_ADDR);
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mday = rtc_read(RTC_DATE_REG_ADDR);
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mon = rtc_read(RTC_MON_REG_ADDR);
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year = rtc_read(RTC_YR_REG_ADDR);
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debug("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
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"hr: %02x min: %02x sec: %02x control_status: %02x\n",
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year, mon, mday, wday, hour, min, sec, ctl_stat);
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if (ctl_stat & RTC_CTL_STAT_BIT_OSF) {
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printf("### Warning: RTC oscillator has stopped\n");
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/* clear the OSF flag */
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rtc_write(RTC_CTL_STAT_REG_ADDR,
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rtc_read(RTC_CTL_STAT_REG_ADDR)\
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& ~RTC_CTL_STAT_BIT_OSF);
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ret = -1;
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}
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tmp->tm_sec = bcd2bin(sec & 0x7F);
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tmp->tm_min = bcd2bin(min & 0x7F);
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tmp->tm_hour = bcd2bin(hour & 0x3F);
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tmp->tm_mday = bcd2bin(mday & 0x3F);
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tmp->tm_mon = bcd2bin(mon & 0x1F);
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tmp->tm_year = bcd2bin(year) + 2000;
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tmp->tm_wday = bcd2bin((wday - 1) & 0x07);
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tmp->tm_yday = 0;
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tmp->tm_isdst = 0;
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debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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return ret;
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}
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/* Set the RTC */
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int rtc_set(struct rtc_time *tmp)
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{
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debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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rtc_write(RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100));
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rtc_write(RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon));
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rtc_write(RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1));
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rtc_write(RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday));
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rtc_write(RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour));
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rtc_write(RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min));
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rtc_write(RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec));
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return 0;
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}
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/* Reset the RTC */
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void rtc_reset(void)
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{
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rtc_write(RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */
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rtc_write(RTC_CTL_STAT_REG_ADDR, RTC_PT7C4338_RESET_VAL);
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}
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#else
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static u8 rtc_read(struct udevice *dev, u8 reg)
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{
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return dm_i2c_reg_read(dev, reg);
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}
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static void rtc_write(struct udevice *dev, u8 reg, u8 val)
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{
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dm_i2c_reg_write(dev, reg, val);
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}
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static int pt7c4338_rtc_get(struct udevice *dev, struct rtc_time *tmp)
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{
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int ret = 0;
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u8 sec, min, hour, mday, wday, mon, year, ctl_stat;
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ctl_stat = rtc_read(dev, RTC_CTL_STAT_REG_ADDR);
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sec = rtc_read(dev, RTC_SEC_REG_ADDR);
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min = rtc_read(dev, RTC_MIN_REG_ADDR);
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hour = rtc_read(dev, RTC_HR_REG_ADDR);
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wday = rtc_read(dev, RTC_DAY_REG_ADDR);
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mday = rtc_read(dev, RTC_DATE_REG_ADDR);
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mon = rtc_read(dev, RTC_MON_REG_ADDR);
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year = rtc_read(dev, RTC_YR_REG_ADDR);
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debug("Get RTC year: %02x mon: %02x mday: %02x wday: %02x\n",
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year, mon, mday, wday);
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debug("hr: %02x min: %02x sec: %02x control_status: %02x\n",
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hour, min, sec, ctl_stat);
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if (ctl_stat & RTC_CTL_STAT_BIT_OSF) {
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printf("### Warning: RTC oscillator has stopped\n");
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/* clear the OSF flag */
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rtc_write(dev, RTC_CTL_STAT_REG_ADDR,
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rtc_read(dev,
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RTC_CTL_STAT_REG_ADDR)
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& ~RTC_CTL_STAT_BIT_OSF);
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ret = -1;
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}
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tmp->tm_sec = bcd2bin(sec & 0x7F);
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tmp->tm_min = bcd2bin(min & 0x7F);
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tmp->tm_hour = bcd2bin(hour & 0x3F);
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tmp->tm_mday = bcd2bin(mday & 0x3F);
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tmp->tm_mon = bcd2bin(mon & 0x1F);
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tmp->tm_year = bcd2bin(year) + 2000;
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tmp->tm_wday = bcd2bin((wday - 1) & 0x07);
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tmp->tm_yday = 0;
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tmp->tm_isdst = 0;
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debug("Get DATE: %4d-%02d-%02d [wday=%d] TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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return ret;
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}
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static int pt7c4338_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
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{
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debug("Set DATE: %4d-%02d-%02d [wday=%d] TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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rtc_write(dev, RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100));
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rtc_write(dev, RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon));
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rtc_write(dev, RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1));
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rtc_write(dev, RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday));
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rtc_write(dev, RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour));
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rtc_write(dev, RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min));
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rtc_write(dev, RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec));
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return 0;
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}
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static int pt7c4338_rtc_reset(struct udevice *dev)
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{
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rtc_write(dev, RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */
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rtc_write(dev, RTC_CTL_STAT_REG_ADDR, RTC_PT7C4338_RESET_VAL);
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return 0;
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}
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static const struct rtc_ops pt7c4338_rtc_ops = {
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.get = pt7c4338_rtc_get,
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.set = pt7c4338_rtc_set,
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.reset = pt7c4338_rtc_reset,
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};
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static const struct udevice_id pt7c4338_rtc_ids[] = {
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{ .compatible = "pericom,pt7c4338" },
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{ }
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};
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U_BOOT_DRIVER(rtc_pt7c4338) = {
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.name = "rtc-pt7c4338",
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.id = UCLASS_RTC,
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.of_match = pt7c4338_rtc_ids,
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.ops = &pt7c4338_rtc_ops,
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};
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#endif
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