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8ef583a035
The include/miiphy.h header duplicates a lot of things from linux/mii.h. So punt all the things that overlap to keep the API simple and to make merging between U-Boot and Linux simpler. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
126 lines
4.1 KiB
C
126 lines
4.1 KiB
C
/*----------------------------------------------------------------------------+
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| This source code is dual-licensed. You may use it under the terms of the
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| GNU General Public License version 2, or under the license below.
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| This source code has been made available to you by IBM on an AS-IS
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| basis. Anyone receiving this source is licensed under IBM
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| copyrights to use it in any way he or she deems fit, including
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| copying it, modifying it, compiling it, and redistributing it either
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| with or without modifications. No license under IBM patents or
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| patent applications is to be implied by the copyright license.
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| Any user of this software should understand that IBM cannot provide
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| technical support for this software and will not be responsible for
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| any consequences resulting from the use of this software.
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| Any person who transfers this source code or any derivative work
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| must include the IBM copyright notice, this paragraph, and the
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| preceding two paragraphs in the transferred software.
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| COPYRIGHT I B M CORPORATION 1999
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| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
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| Additions (C) Copyright 2009 Industrie Dial Face S.p.A.
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+----------------------------------------------------------------------------*/
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/*----------------------------------------------------------------------------+
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| File Name: miiphy.h
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| Function: Include file defining PHY registers.
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| Author: Mark Wisner
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+----------------------------------------------------------------------------*/
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#ifndef _miiphy_h_
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#define _miiphy_h_
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#include <linux/mii.h>
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#include <net.h>
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int miiphy_read (const char *devname, unsigned char addr, unsigned char reg,
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unsigned short *value);
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int miiphy_write (const char *devname, unsigned char addr, unsigned char reg,
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unsigned short value);
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int miiphy_info (const char *devname, unsigned char addr, unsigned int *oui,
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unsigned char *model, unsigned char *rev);
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int miiphy_reset (const char *devname, unsigned char addr);
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int miiphy_speed (const char *devname, unsigned char addr);
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int miiphy_duplex (const char *devname, unsigned char addr);
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int miiphy_is_1000base_x (const char *devname, unsigned char addr);
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#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
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int miiphy_link (const char *devname, unsigned char addr);
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#endif
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void miiphy_init (void);
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void miiphy_register (const char *devname,
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int (*read) (const char *devname, unsigned char addr,
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unsigned char reg, unsigned short *value),
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int (*write) (const char *devname, unsigned char addr,
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unsigned char reg, unsigned short value));
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int miiphy_set_current_dev (const char *devname);
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const char *miiphy_get_current_dev (void);
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void miiphy_listdev (void);
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#ifdef CONFIG_BITBANGMII
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#define BB_MII_DEVNAME "bb_miiphy"
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struct bb_miiphy_bus {
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char name[NAMESIZE];
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int (*init)(struct bb_miiphy_bus *bus);
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int (*mdio_active)(struct bb_miiphy_bus *bus);
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int (*mdio_tristate)(struct bb_miiphy_bus *bus);
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int (*set_mdio)(struct bb_miiphy_bus *bus, int v);
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int (*get_mdio)(struct bb_miiphy_bus *bus, int *v);
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int (*set_mdc)(struct bb_miiphy_bus *bus, int v);
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int (*delay)(struct bb_miiphy_bus *bus);
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#ifdef CONFIG_BITBANGMII_MULTI
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void *priv;
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#endif
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};
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extern struct bb_miiphy_bus bb_miiphy_buses[];
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extern int bb_miiphy_buses_num;
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void bb_miiphy_init (void);
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int bb_miiphy_read (const char *devname, unsigned char addr,
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unsigned char reg, unsigned short *value);
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int bb_miiphy_write (const char *devname, unsigned char addr,
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unsigned char reg, unsigned short value);
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#endif
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/* phy seed setup */
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#define AUTO 99
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#define _1000BASET 1000
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#define _100BASET 100
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#define _10BASET 10
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#define HALF 22
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#define FULL 44
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/* phy register offsets */
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#define MII_MIPSCR 0x11
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/* MII_LPA */
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#define PHY_ANLPAR_PSB_802_3 0x0001
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#define PHY_ANLPAR_PSB_802_9 0x0002
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/* MII_CTRL1000 masks */
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#define PHY_1000BTCR_1000FD 0x0200
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#define PHY_1000BTCR_1000HD 0x0100
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/* MII_STAT1000 masks */
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#define PHY_1000BTSR_MSCF 0x8000
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#define PHY_1000BTSR_MSCR 0x4000
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#define PHY_1000BTSR_LRS 0x2000
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#define PHY_1000BTSR_RRS 0x1000
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#define PHY_1000BTSR_1000FD 0x0800
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#define PHY_1000BTSR_1000HD 0x0400
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/* phy EXSR */
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#define ESTATUS_1000XF 0x8000
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#define ESTATUS_1000XH 0x4000
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#endif
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