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https://github.com/AsahiLinux/u-boot
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f885b84968
In order for the gmac nic to work reliable on the Bananapi, we need to set bits 10-12 GTXDC "GMAC Transmit Clock Delay Chain" of the GMAC clk register (0x01c20164) to 3. Without this about 9 out of 10 ethernet packets get lost, with this setting there is no packet loss. So far setting these bits is only necessary on the Bananapi, so this commit solves this with a bit of #ifdef CONFIG_BANANAPI code. If in the future we need to do something similar for other boards, we can create a specific CONFIG_FOO option for this then. Reported-by: Karsten Merker <merker@debian.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Karsten Merker <merker@debian.org> Tested-by: Zoltan HERPAI <wigyori@openwrt.org> Tested-by: Tony Zhang <tony.zhang@lemaker.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
52 lines
1.3 KiB
C
52 lines
1.3 KiB
C
#include <common.h>
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#include <netdev.h>
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#include <miiphy.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/gpio.h>
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int sunxi_gmac_initialize(bd_t *bis)
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{
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int pin;
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struct sunxi_ccm_reg *const ccm =
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(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
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/* Set up clock gating */
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setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
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/* Set MII clock */
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#ifdef CONFIG_RGMII
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setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
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CCM_GMAC_CTRL_GPIT_RGMII);
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#else
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setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_MII |
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CCM_GMAC_CTRL_GPIT_MII);
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#endif
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/*
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* In order for the gmac nic to work reliable on the Bananapi, we
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* need to set bits 10-12 GTXDC "GMAC Transmit Clock Delay Chain"
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* of the GMAC clk register to 3.
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*/
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#ifdef CONFIG_BANANAPI
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setbits_le32(&ccm->gmac_clk_cfg, 0x3 << 10);
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#endif
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/* Configure pin mux settings for GMAC */
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for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(16); pin++) {
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#ifdef CONFIG_RGMII
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/* skip unused pins in RGMII mode */
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if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14))
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continue;
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#endif
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sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC);
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sunxi_gpio_set_drv(pin, 3);
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}
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#ifdef CONFIG_RGMII
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return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII);
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#else
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return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_MII);
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#endif
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}
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