u-boot/arch/arm/dts/suniv-f1c100s-licheepi-nano.dts
Andre Przywara 57285737cb sunxi: dts: arm/arm64: update devicetree files from Linux-v6.4-rc2
Sync the devicetree files from the official Linux kernel tree, v6.4-rc2.
This is covering both 64-bit and 32-bit Allwinner SoCs with Arm Ltd.
cores, we skip the new RISC-V bits for now, as sunxi RISC-V support
is still work in progress.

Among smaller cosmetic changes, this adds a SATA regulator node which we
need in U-Boot to get rid of hard-coded GPIOs.
Also this updates the Allwinner F1C100s DTs, enabling USB support, and
also adds the DTs for two new boards.

As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-06-07 22:44:40 +01:00

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1.2 KiB
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// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
* Copyright 2018 Icenowy Zheng <icenowy@aosc.io>
*/
/dts-v1/;
#include "suniv-f1c100s.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Lichee Pi Nano";
compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s";
aliases {
mmc0 = &mmc0;
serial0 = &uart0;
spi0 = &spi0;
};
chosen {
stdout-path = "serial0:115200n8";
};
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&mmc0 {
broken-cd;
bus-width = <4>;
disable-wp;
status = "okay";
vmmc-supply = <&reg_vcc3v3>;
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pc_pins>;
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q128", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
};
};
&otg_sram {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pe_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&pio 4 2 GPIO_ACTIVE_HIGH>; /* PE2 */
status = "okay";
};