mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 17:07:38 +00:00
57285737cb
Sync the devicetree files from the official Linux kernel tree, v6.4-rc2. This is covering both 64-bit and 32-bit Allwinner SoCs with Arm Ltd. cores, we skip the new RISC-V bits for now, as sunxi RISC-V support is still work in progress. Among smaller cosmetic changes, this adds a SATA regulator node which we need in U-Boot to get rid of hard-coded GPIOs. Also this updates the Allwinner F1C100s DTs, enabling USB support, and also adds the DTs for two new boards. As before, this omits the non-backwards compatible changes to the R_INTC controller, to remain compatible with older kernels. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
238 lines
5.4 KiB
Text
238 lines
5.4 KiB
Text
/*
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* Copyright 2016 Free Electrons
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* Copyright 2016 NextThing Co
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "sun5i-gr8.dtsi"
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#include "sunxi-common-regulators.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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model = "NextThing C.H.I.P. Pro";
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compatible = "nextthing,chip-pro", "nextthing,gr8";
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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led-0 {
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label = "chip-pro:white:status";
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gpios = <&axp_gpio 2 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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};
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mmc0_pwrseq: mmc0_pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; /* PB10 */
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};
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};
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&codec {
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status = "okay";
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};
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&ehci0 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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axp209: pmic@34 {
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reg = <0x34>;
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/*
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* The interrupt is routed through the "External Fast
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* Interrupt Request" pin (ball G13 of the module)
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* directly to the main interrupt controller, without
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* any other controller interfering.
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*/
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interrupts = <0>;
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};
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};
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#include "axp209.dtsi"
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&i2c1 {
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status = "disabled";
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};
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&i2s0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2s0_mclk_pin>, <&i2s0_data_pins>;
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status = "disabled";
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};
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&mmc0 {
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vmmc-supply = <®_vcc3v3>;
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mmc-pwrseq = <&mmc0_pwrseq>;
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bus-width = <4>;
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non-removable;
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status = "okay";
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};
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&nfc {
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pinctrl-names = "default";
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pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>;
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status = "okay";
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nand@0 {
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reg = <0>;
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allwinner,rb = <0>;
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nand-ecc-mode = "hw";
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};
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};
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&ohci0 {
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status = "okay";
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};
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&otg_sram {
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status = "okay";
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};
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&pwm {
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pinctrl-names = "default";
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pinctrl-0 = <&pwm0_pin>, <&pwm1_pins>;
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status = "disabled";
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};
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®_dcdc2 {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1400000>;
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regulator-name = "vdd-cpu";
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regulator-always-on;
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};
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®_dcdc3 {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1300000>;
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regulator-name = "vdd-sys";
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regulator-always-on;
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};
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®_ldo1 {
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regulator-name = "vdd-rtc";
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};
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®_ldo2 {
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regulator-min-microvolt = <2700000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "avcc";
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regulator-always-on;
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};
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/*
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* Both LDO3 and LDO4 are used in parallel to power up the
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* WiFi/BT chip.
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*/
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®_ldo3 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-wifi-1";
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regulator-always-on;
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};
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®_ldo4 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-wifi-2";
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regulator-always-on;
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pins>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pd_pins>, <&uart2_cts_rts_pd_pins>;
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status = "disabled";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart3_pg_pins>, <&uart3_cts_rts_pg_pins>;
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status = "okay";
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};
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&usb_otg {
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/*
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* The CHIP Pro doesn't have a controllable VBUS, nor does it
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* have any 5v rail on the board itself.
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*
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* If one wants to use it as a true OTG port, it should be
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* done in the baseboard, and its DT / overlay will add it.
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*/
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dr_mode = "otg";
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status = "okay";
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};
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&usb_power_supply {
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status = "okay";
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};
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&usbphy {
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usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
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usb0_vbus_power-supply = <&usb_power_supply>;
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usb1_vbus-supply = <®_vcc5v0>;
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status = "okay";
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};
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