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9c107ab42b
This file is included by the different chameleonv3 variants. Change the name to .dtsi. Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Simon Glass <sjg@chromium.org>
90 lines
1.1 KiB
Text
90 lines
1.1 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2022 Google LLC
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*/
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/dts-v1/;
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#include "socfpga_arria10_mercury_aa1.dtsi"
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/ {
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model = "Google Chameleon V3";
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compatible = "google,chameleon-v3",
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"altr,socfpga-arria10", "altr,socfpga";
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aliases {
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serial0 = &uart0;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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};
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};
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&gmac0 {
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status = "okay";
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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ssm2603: ssm2603@1a {
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compatible = "adi,ssm2603";
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reg = <0x1a>;
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};
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};
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&i2c1 {
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status = "okay";
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u80: u80@21 {
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compatible = "nxp,pca9535";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-line-names =
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"SOM_AUD_MUTE",
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"DP1_OUT_CEC_EN",
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"DP2_OUT_CEC_EN",
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"DP1_SOM_PS8469_CAD",
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"DPD_SOM_PS8469_CAD",
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"DP_OUT_PWR_EN",
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"STM32_RST_L",
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"STM32_BOOT0",
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"FPGA_PROT",
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"STM32_FPGA_COMM0",
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"TP119",
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"TP120",
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"TP121",
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"TP122",
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"TP123",
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"TP124";
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};
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};
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&mmc {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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dr_mode = "host";
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};
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